AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 83

• Manufacturer Part Number: AT94K05AL
• Description: Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
• Manufacturer: ATMEL Corporation

Rev. 1138F–FPSLI–06/02
Table 19. AVR I/O Boundary Scan – JTAG Instructions $0/$2
Notes:
Table 20. Bit EXTEST and SAMPLE_PRELOAD
Input with Pull-up - INTPn
Input with Pull-up - RXn
Enable Clock - XTAL 1
2-wire Serial
Enable Output - PXn
Enable Output - TXn
I/O Ports
1. Observe-only scan cell.
2. AVR Reset is High (one) if AVRResetn activated (Low) and enabled or the device is in
TOSC
XTAL
Data Out/In - PXn
Clock In - XTAL1
(2)
general reset (Resetn or power-on) or configuration download.
Data Out - TXn
Pull-up - PXn
Pull-up - TXn
Bit Type
EXTEST
Defines value driven if enabled.
Capture-DR grabs signal on pad.
1 = output drive enabled.
Capture-DR grabs output enable
scan latch.
1 = pull-up disabled.
Capture-DR grabs pull-up control
from the AVR.
Observe only. Capture-DR grabs
signal from pad.
Defines value driven if enabled.
Capture-DR grabs signal on pad.
1 = output drive enabled.
Capture-DR grabs output enable
scan latch.
1 = pull-up disabled.
Capture-DR grabs pull-up control
from the AVR.
Observe only. Capture-DR grabs
signal from pad.
Observe only. Capture-DR grabs
signal from pad.
1 = clock disabled. Capture-DR
grabs clock enable from the AVR.
Enable Clock - TOSC 1
Enable Clock - XTAL 1
Enable Output - SDA
Enable Output - SCL
AT94K Series FPSLIC
Clock Out/In - SCL
Clock In - TOSC 1
Data Out/In - SDA
Clock In - XTAL1
Description
AVR Reset
SAMPLE_PRELOAD
Capture-DR grabs signal from
pad if output disabled, or from the
AVR if the output drive is enabled.
Capture-DR grabs output enable
from the AVR.
Capture-DR grabs pull-up control
from the AVR.
Capture-DR grabs signal from
pad.
Capture-DR always grabs “0”
since Tx input is NC and tied to
ground internally.
Capture-DR grabs output enable
from the AVR.
Capture-DR grabs pull-up control
from the AVR.
Capture-DR grabs signal from
pad.
Capture-DR grabs signal from
pad if clock is enabled, “1” if
disabled.
Capture-DR grabs enable from
the AVR.
Bit
8
6
4
2
0
7
5
3
1
(1)
(1)
(1)
(1)
(1)
-> TDO
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