AD10242PCB Analog Devices, AD10242PCB Datasheet - Page 11

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AD10242PCB

Manufacturer Part Number
AD10242PCB
Description
Dual Channel, 12-Bit, 40 MSPS MCM A/D Converter With Dc-coupled Analog Input Signal Conditioning (AD9042 Core ADC)
Manufacturer
Analog Devices
Datasheet
If a logic threshold other than the nominal 1.6 V is required,
the following equations show how to use an external resistor,
Rx, to raise or lower the trip point (see Figure 4, R1 = 17 kΩ,
R2 = 8 kΩ).
V
V
While the single-ended encode will work well for many applica-
tions, driving the encode differentially will provide increased
performance. Depending on circuit layout and system noise, a
1 dB to 3 dB improvement in SNR can be realized. It is recom-
mended that the encode signal be ac-coupled into the ENCODE
and ENCODE pins.
The simplest option is shown below. The low jitter TTL signal
is coupled with a limiting resistor, typically 100 Ω, to the primary
side of an RF transformer (these transformers are inexpensive
and readily available; part number in figure is from Mini-Circuits).
The secondary side is connected to the ENCODE and ENCODE
pins of the converter. Since both encode inputs are self-biased,
no additional components are required.
1
1
=
=
R R
R
1 2
2
+
5 2
R
+
R
5 2
R Rx
1
TTL
R Rx
R Rx
1
0.01 F
+
1
ENCODE
SOURCE
ENCODE
SOURCE
Rx
+
100
0.01 F
to raise logic threshold.
R Rx
2
R
V
R
AV
T1–1T
x
l
x
V
CC
l
to lower logic threshold.
AD10242
ENCODE
ENCODE
ENCODE
ENCODE
AD10242
ENCODE
ENCODE
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5V
5V
R1
R2
R1
R2
If no TTL source is available, a clean sine wave may be substi-
tuted. In the case of the sine source, the matching network is
shown below. Since the matching transformer specified is a 1:1
impedance ratio, R, the load resistor should be selected to match
the source impedance. The input impedance of the AD9042
is negligible in most cases.
If a low jitter ECL clock is available, another option is to ac-couple
a differential ECL signal to the encode input pins as shown
below. The capacitors shown here should be chip capacitors but
do not need to be of the low inductance variety.
As a final alternative, the ECL gate may be replaced by an ECL
comparator. The input to the comparator could then be a logic
signal or a sine signal.
Care should be taken not to overdrive the encode input pin
when ac coupled. Although the input circuitry is electrically pro-
tected from over- or undervoltage conditions, improper circuit
operations may result from overdriving the encode input pin.
SOURCE
SINE
50
GATE
ECL
AD96687 (1/2)
510
510
–V
S
T1–1T
510
–V
S
0.1 F
0.1 F
510
0.1 F
0.1 F
R
ENCODE
ENCODE
ENCODE
ENCODE
ENCODE
ENCODE
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