PIC12F675ISN Microchip Technology, PIC12F675ISN Datasheet - Page 15
PIC12F675ISN
Manufacturer Part Number
PIC12F675ISN
Description
8-Pin FLASH-Based 8-Bit CMOS Microcontrollers
Manufacturer
Microchip Technology
Datasheet
1.PIC12F675ISN.pdf
(132 pages)
- Current page: 15 of 132
- Download datasheet (5Mb)
2.2.2.3
The INTCON register is a readable and writable
register, which contains the various enable and flag bits
for TMR0 register overflow, GPIO port change and
external GP2/INT pin interrupts.
REGISTER 2-3:
2003 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON Register
INTCON — INTERRUPT CONTROL REGISTER (ADDRESS: 0Bh OR 8Bh)
bit 7
GIE: Global Interrupt Enable bit
1 = Enables all unmasked interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE: GP2/INT External Interrupt Enable bit
1 = Enables the GP2/INT external interrupt
0 = Disables the GP2/INT external interrupt
GPIE: Port Change Interrupt Enable bit
1 = Enables the GPIO port change interrupt
0 = Disables the GPIO port change interrupt
T0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF: GP2/INT External Interrupt Flag bit
1 = The GP2/INT external interrupt occurred (must be cleared in software)
0 = The GP2/INT external interrupt did not occur
GPIF: Port Change Interrupt Flag bit
1 = When at least one of the GP5:GP0 pins changed state (must be cleared in software)
0 = None of the GP5:GP0 pins have changed state
Legend:
R = Readable bit
- n = Value at POR
R/W-0
Note 1: IOC register must also be enabled to enable an interrupt-on-change.
GIE
2: T0IF bit is set when TIMER0 rolls over. TIMER0 is unchanged on RESET and
should be initialized before clearing T0IF bit.
R/W-0
PEIE
R/W-0
T0IE
W = Writable bit
’1’ = Bit is set
R/W-0
INTE
(2)
(1)
Note:
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
GPIE
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate
interrupt flag bits are clear prior to enabling
an interrupt.
PIC12F629/675
R/W-0
T0IF
x = Bit is unknown
R/W-0
INTF
DS41190C-page 13
R/W-0
GPIF
bit 0
Related parts for PIC12F675ISN
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
8-Pin/ 8-Bit CMOS Microcontroller with EEPROM Data Memory
Manufacturer:
Microchip Technology
Part Number:
Description:
IC, 8BIT MCU, PIC12, 32MHZ, DFN-8
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
IC, 8BIT MCU, PIC12, 32MHZ, DFN-8
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet: