NJU3426 NJR Corporation, NJU3426 Datasheet
NJU3426
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NJU3426 Summary of contents
Page 1
... It consists of display data RAM, an address counter, command registers, a serial interface and high voltage drivers. The direct control from the MPU and high voltage drivers of 45V make the NJU3426 well suited for various VFD displays. FEATURES Directly Drives 16-segment x 14-digit High VFD Driving Voltage ...
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... SI Serial Data Input (8 bits = 1 word 13, N.C. Non connections 14, 25, 26, 37, 38 NJU3426FP1 V =3 =0V SS The internal oscillator is formed by connecting an external ceramic resonator to these pins. When an external oscillator is used instead of the internal oscillator, the external clock is input to the XT and the XTb must be open. ...
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... These display data is ignored. DISPLAY DATA RAM MAPPING NJU3426 st word, ranges from “0,0,0,0,0” (00 ) every display data transmission because and begins counting up. Note that the ignored in this sequence ...
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... NJU3426 (2) COMMAND REGISTER 1 The “Command register 1” is used for setting “Duty ratio for timing signal”, “Display control ON/OFF” and “Shifting display digits”. When the upper 1 bit (B7) of the 1 command data, and stored in the “Command register 1”. Note that changing the “Duty ratio” or “Shifting display digits” ...
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... DS1 DS0 Initial character address Prohibited NJU3426 pin. When the ...
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... NJU3426 (4) DISPLAY SHIFT OPERATION The display shift operation can be performed by changing the “Initial character address” of the “Command register 2”. And, the number of digits for the display shift in the loop is determined by the “Shifting display digits” of the “Command register 1”. In other words, shifting display area ranges from the “Initial character address” specified by the “ ...
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... =(1 NJU3426 (Duty count) :800kHz to 3.5MHz : 9.2 s :640 s to 147.2 s :20.608ms to 8.96ms Timing signal ( Segment signal - 7 - ...
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... NJU3426 (5) SERIAL DATA TRANSMISSION Communication between the NJU3426 and MPU uses the serial data transmission with synchronous clock, and 8 bits serial data constitutes 1 word. Each bit on the SI pin is fetched at the rising edge of the serial clock (SCK), and the entire 8 bits are loaded as 1 word at the rising edge of the chip select (CSb). ...
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... I OL Topr - Tstg -55 to 125 PD 1500 mW and V and V and V must be connected for stabble operation FDP SS > NJU3426 (V =0V, Ta= CONDITIONS Relative pin out pins pin out pins 0 13 All output pins ...
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... NJU3426 ELECTRICAL CHARACTERISTICS DC characteristics 1 PARAMETER SYMBOL Operating voltage V DD “H” level input voltage V IH “L” level input voltage V IL Input off leak current I IZ Display output current I OH resistance R Pull-up UR Pull-down resistance R DST Logic operating current I SS Display operating ...
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... Ceramic resonator:1MHz, All Segment/Timing output ON SYMBOL CONDITIONS f XT, Fig Fig. 1 CLH CLL t Fig. 2 SIS t Fig. 2 SIH f Fig. 3 SCK t Fig. 3 SCI t Fig. 4 RSTb t Fig NJU3426 (V =3.3V, V =0V, Ta=- MIN TYP MAX 3.0 3.6 0. T.B.D. -4 T.B.D. -9 105 165 225 60 100 140 0.8 1 =3.3V, V ...
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... NJU3426 XT, XTb SCK SI 50% CSb SCK 50% t SCI RSTb XT CLH CLL Fig SIS Fig SCI SCK Fig RSTb Fig 90% DD 10% Fig ...
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... V FDP V FDP N.C. RSTb CSb MPU SCK XTb Ver.2003-03-06 NJU3426FP1 VFD NJU3426 [CAUTION] [CAUTION] The specifications on this databook are only The specifications on this databook are only given for information , without any guarantee given for information , without any guarantee as regards either mistakes or omissions ...