DM74LS245N Fairchild Semiconductor, DM74LS245N Datasheet

IC TXRX BUS BIDIRECT 3ST 20-DIP

DM74LS245N

Manufacturer Part Number
DM74LS245N
Description
IC TXRX BUS BIDIRECT 3ST 20-DIP
Manufacturer
Fairchild Semiconductor
Series
74LSr
Datasheet

Specifications of DM74LS245N

Logic Type
Transceiver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
15mA, 24mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
74LS245
74LS245N

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DM74LS245N
Manufacturer:
NS
Quantity:
3 000
Part Number:
DM74LS245N
Manufacturer:
BI Technologies
Quantity:
5 510
Part Number:
DM74LS245N
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
© 2000 Fairchild Semiconductor Corporation
DM74LS245WM
DM74LS245SJ
DM74LS245N
DM74LS245
3-STATE Octal Bus Transceiver
General Description
These octal bus transceivers are designed for asynchro-
nous two-way communication between data buses. The
control function implementation minimizes external timing
requirements.
The device allows data transmission from the A Bus to the
B Bus or from the B Bus to the A Bus depending upon the
logic level at the direction control (DIR) input. The enable
input (G) can be used to disable the device so that the
buses are effectively isolated.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
M20B
M20D
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS006413
Features
Function Table
H
L
X
Bi-Directional bus transceiver in a high-density 20-pin
package
3-STATE outputs drive bus lines directly
PNP inputs reduce DC loading on bus lines
Hysteresis at bus inputs improve noise margins
Typical propagation delay times, port-to-port 8 ns
Typical enable/disable times 17 ns
I
I
LOW Level
Irrelevant
OL
OH
HIGH Level
Enable
(sink current)
(source current)
24 mA
Package Description
G
H
L
L
15 mA
Direction
Control
DIR
H
X
L
August 1986
Revised March 2000
B Data to A Bus
A Data to B Bus
www.fairchildsemi.com
Operation
Isolation

Related parts for DM74LS245N

DM74LS245N Summary of contents

Page 1

... Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings Supply Voltage Input Voltage DIR Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input ...

Page 3

Switching Characteristics V 5V Symbol Parameter t Propagation Delay Time, PLH LOW-to-HIGH Level Output t Propagation Delay Time, PHL HIGH-to-LOW Level Output t Output Enable Time PZL to LOW Level t Output Enable Time PZH ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide www.fairchildsemi.com Package Number M20B 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

Related keywords