PIC18LF8720 Microchip Technology, PIC18LF8720 Datasheet - Page 109
PIC18LF8720
Manufacturer Part Number
PIC18LF8720
Description
(PIC18LF6620/6520/8520/6620/8620/6720/8720) 64/80-Pin High-Performance / 64-Kbyte Enhanced Flash Microcontrollers
Manufacturer
Microchip Technology
Datasheet
1.PIC18LF8720.pdf
(380 pages)
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FIGURE 10-6:
FIGURE 10-7:
2004 Microchip Technology Inc.
Note 1:
2:
3:
Note 1:
I/O pin has diode protection to V
To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (INTCON2<7>).
The CCP2 input/output is multiplexed with RB3 if the CCP2MX bit is enabled (= 0) in the Configuration register and the device
is operating in Microprocessor, Microprocessor with Boot Block or Extended Microcontroller mode.
PIC18F6520/8520/6620/8620/6720/8720
2:
RBPU
Data Bus
RD TRISB
RD LATB
RD PORTB
BLOCK DIAGRAM OF RB2:RB0 PINS
BLOCK DIAGRAM OF RB3 PIN
CCP2MX
CCP Output
Enable
CCP Output
WR LATB or
WR PORTB
WR TRISB
RD PORTB
CCP2 or INT3
I/O pins have diode protection to V
To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>).
(2)
(3)
RBPU
Data Bus
RD TRIS
RD Port
INTx
WR Port
WR TRIS
(3)
(2)
Schmitt Trigger
Buffer
TRIS Latch
Data Latch
D
D
CK
CK
DD
and V
Q
Q
CCP2MX = 0
SS
DD
.
Data Latch
TRIS Latch
D
D
and V
CK
CK
Q
1
0
Schmitt Trigger
Buffer
SS
Q
Q
EN
.
D
Q
EN
D
TTL
Input
Buffer
V
V
N
P
DD
SS
V
P
RD Port
DD
TTL
Input
Buffer
Weak
Pull-up
I/O pin
V
P
DD
(1)
Weak
Pull-up
I/O pin
(1)
DS39609B-page 107
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