MT29F128G08WAAC6 Micron, MT29F128G08WAAC6 Datasheet - Page 81
MT29F128G08WAAC6
Manufacturer Part Number
MT29F128G08WAAC6
Description
NAND Flash Memory
Manufacturer
Micron
Datasheet
1.MT29F128G08WAAC6.pdf
(115 pages)
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Interleaved TWO-PLANE BLOCK ERASE Operations
Figure 55:
PDF: 09005aef8278ee3f / Source: 09005aef81f17540
16gb_nand_mlc_l52a__2.fm -Rev. D 5/08 EN
I/Ox
R/B#
(die 1 internal)
R/B#
(die 2 internal
R/B#
(external)
I/Ox
R/B#
(die 1 internal)
R/B#
(die 2 internal)
R/B#
(external)
1
Interleaved TWO-PLANE BLOCK ERASE with Status Register Monitoring
78h
60h
Address
Address
Die 1
Die 1 (optional)
Notes: 1. Two-plane addressing requirements apply.
D1h
Figure 55 shows how to perform interleaved TWO-PLANE BLOCK ERASE operations.
The TWO-PLANE/MULTIPLE-DIE READ STATUS (78h) command is used to monitor the
status register for operation completion.
The interleaved TWO-PLANE BLOCK ERASE operation must meet two-plane addressing
requirements. See “Two-Plane Addressing” on page 55 for details.
Status
60h
60h
Micron Confidential and Proprietary
Address
Address
Die 1
Die 1
D0h
D1h
81
www.DataSheet.net/
60h
60h
16, 32, 64, 128Gb NAND Flash Memory
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Address
Address
Die 1
Die 2 (optional)
D0h
D1h
Command Definitions
©2005 Micron Technology, Inc. All rights reserved.
60h
Address
78h
Die 2
Address
Die 2
D0h
Status
1
Datasheet pdf - http://www.DataSheet4U.co.kr/
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