ISL36411 Intersil, ISL36411 Datasheet
ISL36411
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ISL36411 Summary of contents
Page 1
... The small form factor, highly-integrated quad design is ideal for high-density data transmission applications including active copper cable assemblies. The four equalizing filters within the ISL36411 can each be set to provide optimal signal fidelity for a given media and length. The compensation level for the filters is set by two external control pins ...
Page 2
... SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL36411. For more information on MSL please see techbrief TB363. ...
Page 3
... Tie to ground to disable electrical idle preservation and always enable the limiting amplifier. Exposed Pad - Exposed ground pad. For proper electrical and thermal performance, this pad should be connected to the PCB ground plane. 3 ISL36411 DESCRIPTION www.DataSheet4U.com FN6965.1 March 25, 2010 ...
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... Diff. Conversion) Output Amplitude Range V OUT Differential Output Impedance 4 ISL36411 Thermal Information Thermal Resistance (Typical QFN Package (Notes Operating Ambient Temperature Range 0°C to +85°C Storage Ambient Temperature Range . . . . . -55°C to +150°C Maximum Junction Temperature +125°C Pb-Free Reflow Profile see link below http://www ...
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... Data-to-Line Silence Response Time NOTES: 6. After channel loss, differential amplitudes at ISL36411 inputs must meet the input voltage range specified in “Absolute Maximum Ratings” on page 4. 7. Maximum Reflection Coefficient given by equation SDDXX(dB)= -12 + 2*√(f), with f in GHz. Established by characterization and not production tested. ...
Page 6
... Performance is measured using the test setup illustrated in Figure 1. The signal from the pattern generator is launched into the twin-ax cable using an SMA adapter card. The chip evaluation board is connected to the output of the cable through another adapter card. The ISL36411 output signal is then visualized on a scope to determine signal integrity parameters such as jitter. ...
Page 7
... Operation The ISL36411 is an advanced quad lane-extender for high-speed interconnects. A functional diagram of one of the four channels in the ISL36411 is shown in Figure 3. In addition to a robust equalization filter to compensate for channel loss and restore signal fidelity, the ISL36411 contains unique integrated features to preserve special signaling protocols typically broken by other equalizers ...
Page 8
... Other values of the resistor may also be applicable; therefore DT settings should be verified on an application-specific basis. PCB Layout Considerations Because of the high speed of the ISL36411 signals, careful PCB layout is critical to maximize performance. The following guidelines should be adhered to as closely as possible: • All high speed differential pair traces should have a characteristic impedance of 50Ω ...
Page 9
... Application Information Typical application schematic for ISL36411 is shown in Figure 6. 1.2V Bypass circuit for each V pin DD (*100pF capacitor should be positioned closest to the pin) NOTES: 15. See “Control Pin Boost Setting” on page 7 for information on how to connect the CP pins. 16. See “Detection Thereshold (DT) Pin Functionality” on page 8 for details on DT pin operation. ...
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... Intersil Lane Extenders allow greater reach over existing cabling while reducing the need for thicker cables. This significantly reduces cable weight and clutter, increases airflow, and improves power consumption. 10 ISL36411 www.DataSheet4U.com FN6965.1 March 25, 2010 ...
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... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 11 ISL36411 VOL : delete typical “0” for a complete list of Intersil product families. ISL36411 www.intersil.com/askourstaff http://rel.intersil.com/reports/search.php www.intersil.com/product_tree www.intersil.com/design/quality www.DataSheet4U.com CHANGE www ...
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... LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE (TQFN) Rev 0, 9/09 4.00 6 PIN 1 INDEX AREA (4X) 0.05 TOP VIEW 0.70 ±0.05 SIDE VIEW ( 3. 2.50 5.50 ) TYPICAL RECOMMENDED LAND PATTERN 12 ISL36411 A B SIDE VIEW SEE DETAIL "X" 0. SEATING PLANE 0.05 C NOTES: 1. Dimensions are in millimeters. Dimensions Dimensioning and tolerancing conform to AMSE Y14.5m-1994. ...