VT6516 ETC, VT6516 Datasheet - Page 49
VT6516
Manufacturer Part Number
VT6516
Description
16/12 PORT 10/1000 ASE T/TX
Manufacturer
ETC
Datasheet
1.VT6516.pdf
(73 pages)
- Current page: 49 of 73
- Download datasheet (441Kb)
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
4.5 Registers of Forwarding Control Module
09H
CLEAR All Free Pointers
Write to this register will reset the two free buffer pointers
according to the SDRAMTYPE. It is the only way to program the
FREE0_PT and FREE1_PT. This command should be taken after
the SDRAMTYPE has been specified.
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 0
Each bit corresponds to a private packet buffer. This mask register
will be cleared to bit pattern 0000-0000 while system reset. The 8
private buffers for the port K are that of entry IDs (K*8) ~ (K*8+7).
But, the CPU IO port has not private buffers.
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 1
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 2
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 3
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 4
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 5
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 6
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 7
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 8
PRIVATE MEMORY ALLOCATION BIT MASK for PORT 9
PRIVATE MEMORY ALLOCATION BIT MASK for PORT
10
PRIVATE MEMORY ALLOCATION BIT MASK for PORT
11
PRIVATE MEMORY ALLOCATION BIT MASK for PORT
12
PRIVATE MEMORY ALLOCATION BIT MASK for PORT
13
PRIVATE MEMORY ALLOCATION BIT MASK for PORT
14
PRIVATE MEMORY ALLOCATION BIT MASK for PORT
15
VIA Technologies, Inc.
-49-
Preliminary VT6516 Datarsheet
CFP
PORT0_M
ASK
PORT1_M
ASK
PORT2_M
ASK
PORT3_M
ASK
PORT4_M
ASK
PORT5_M
ASK
PORT6_M
ASK
PORT7_M
ASK
PORT8_M
ASK
PORT9_M
ASK
PORT10_
MASK
PORT11_
MASK
PORT12_
MASK
PORT13_
MASK
PORT14_
MASK
PORT15_
MASK
[0]
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
[7:0] 0
W/
O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
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