HEF4024BP,652 NXP Semiconductors, HEF4024BP,652 Datasheet
HEF4024BP,652
Manufacturer Part Number
HEF4024BP,652
Description
IC 7STAGE BINARY COUNTER 14DIP
Manufacturer
NXP Semiconductors
Series
4000Br
Type
Binaryr
Specifications of HEF4024BP,652
Package / Case
14-DIP (0.300", 7.62mm)
Logic Type
Binary Counter
Direction
Up
Number Of Elements
1
Number Of Bits Per Element
7
Reset
Asynchronous
Count Rate
35MHz
Trigger Type
Negative Edge
Voltage - Supply
4.5 V ~ 15.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Counter Type
Binary Counters
Logic Family
HEF4024
Number Of Bits
7
Operating Supply Voltage
3 V to 15 V
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Technology
CMOS
Number Of Elements
1
Logical Function
Counter/Divider
Operating Supply Voltage (typ)
3.3/5/9/12V
Output Type
Standard
Package Type
DIP
Propagation Delay Time
240ns
Operating Temp Range
-40C to 85C
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
15V
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Timing
-
Lead Free Status / Rohs Status
Compliant
Other names
933282630652
HEF4024BPN
HEF4024BPN
HEF4024BPN
HEF4024BPN
Product specification
File under Integrated Circuits, IC04
DATA SHEET
HEF4024B
MSI
7-stage binary counter
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
INTEGRATED CIRCUITS
January 1995
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HEF4024BP,652 Summary of contents
Page 1
DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4024B MSI 7-stage binary counter Product specification File under Integrated Circuits, IC04 ...
Page 2
Philips Semiconductors 7-stage binary counter DESCRIPTION The HEF4024B is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs ( The counter advances on ...
Page 3
Acrobat reader. white to force landscape pages to be ... Fig.3 Logic diagram. ...
Page 4
Philips Semiconductors 7-stage binary counter AC CHARACTERISTICS pF; input transition times SS amb Propagation delays HIGH to LOW ...
Page 5
Philips Semiconductors 7-stage binary counter Dynamic power dissipation per package (P) Fig.4 Waveforms showing propagation delays for and recovery time for MR. January 1995 V DD TYPICAL FORMULA FOR 500 f (f ...