ACS8525T Semtech, ACS8525T Datasheet - Page 67
ACS8525T
Manufacturer Part Number
ACS8525T
Description
Line Card Protection Switch for SONET/SDH Systems
Manufacturer
Semtech
Datasheet
1.ACS8525T.pdf
(112 pages)
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Quantity
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Part Number:
ACS8525T
Manufacturer:
SEMTECH/美国升特
Quantity:
20 000
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Revision 3.01/August 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
Bit No.
Bit 7
4
3
2
1
48 (cont...)
cnfg_monitors
los_flag_on_
TDO
Description
ext_switch
Bit to enable external switching mode. When in
external switching mode, the device is only allowed
to lock to a pair of sources. If the programmed
priority of input SEC1 TTL is non-zero, then when the
SRCSW pin is High, the device will be forced to lock
to input SEC1 TTL regardless of the signal present
on that input. If the programmed priority of input
SEC1 TTL is zero, then it will be forced to lock to
input SEC1 DIFF instead. If the programmed priority
of input SEC2 TTL is non-zero, then when the
SRCSW pin is Low, the device will be forced to lock
to input SEC2 TTL regardless of the signal present
on that input. If the programmed priority of input
SEC2 TTL is zero, then it will be forced to lock to
input SEC2 DIFF instead.
* The default value of this bit is dependent on the
value of the SRCSW pin at power-up.
PBO_freeze
Bit to control the freezing of Phase Build-out
operation. If Phase Build-out has been enabled and
there have been some source switches, then the
input-output phase relationship of DPLL1 is
unknown. If Phase Build-out is no longer required,
then it can be frozen. This will maintain the current
input-output phase relationship, but not allow
further Phase Build-out events to take place. Simply
disabling Phase Build-out could cause a phase shift
in the output, as DPLL1 re-locks the phase to zero
degrees.
PBO_en
Bit to enable Phase Build-out events on source
switching. When enabled a Phase Build-out event is
triggered every time DPLL1 selects a new source-
this includes exiting the Holdover or Free-run states.
Not used.
Bit 6
ultra_fast_
switch
Bit 5
Description
ext_switch
Bit 4
FINAL
Page 67
(R/W) Configuration register
controlling several input
monitoring and switching options.
PBO_freeze
Bit Value
Bit 3
0
1
0
1
0
1
-
PBO_en
Value Description
Normal operation mode.
External source switching mode enabled. Operating
mode of the device is always forced to be “locked”
when in this mode.
Phase Build-out not frozen.
Phase Build-out frozen, no further Phase Build-out
events will occur.
Phase Build-out not enabled. DPLL1 locks to zero
degrees phase.
Phase Build-out enabled on source switching.
-
Bit 2
Default Value
ACS8525 LC/P
Bit 1
DATASHEET
www.semtech.com
0000 0100*
Bit 0
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