SG6905 Fairchild Semiconductor, SG6905 Datasheet - Page 15

• Manufacturer Part Number: SG6905
• Manufacturer: Fairchild Semiconductor

Green mode PFC/Flyback-PWM Controller
Line Voltage Detection (VRMS)
Figure 2 shows a resistive divider with low-pass filtering
for line-voltage detection on VRMS pin. The V
voltage is used for the PFC multiplier and brownout
protection.
For brownout protection, the SG6905 is disabled with
195ms delay time if the voltage V
For PFC multiplier, please refer to below section for more
details.
Interleave Switching
The SG6905 uses interleaved switching to synchronize
the PFC and Flyback stages. This reduces switching noise
and spreads the EMI emissions. Figure 3 shows that an
off-time T
PFC gate drive and the turn-on of the PWM.
PFC Operation
is to shape the input current of a power supply. The input
current waveform and phase will follow that of the input
voltage. Using SG6905, average-current-mode control is
utilized for continuous-current-mode operation for the
PFC booster. With the innovative multi-vector control for
voltage loop and switching charge multiplier/divider for
current reference, excellent input power factor is achieved
with good noise immunity and transient response. Figure
4
average-current-mode control circuit of SG6905.
multiplier/divider can be expressed as:
© System General Corp.
Version 1.1.1 (IAO33.0060.B1)
The purpose of a boost active power factor corrector (PFC)
The current source output from the switching charge
FIG.3 Interleaved switching pattern
I
MO
shows
=
OFF
K
×
the
is inserted in between the turn-off of the
I
AC
V
RMS
×
total
V
2
EA
(uA)
control
------------
RMS
drops below 0.8V.
loop
for
(3)
RMS
the
- 15 -
Refer to Fig. 3, the current output from IMP pin, I
summation of I
fixed current sources. They are used to pull high the
operating point of the IMP and IPFC pins since the
voltage across R
The constant current sources I
60µA.
Through the differential amplification of the signal across
Rs, better noise immunity is achieved. The output of IEA
will be compared with an internal sawtooth and hence the
pulse width for PFC is determined. Through the average
current-mode control loop, the input current Is will be
proportional to I
According to equation (4), the minimum value of R2 and
maximum of Rs can be determined since I
exceed the specified maximum value.
There are different concerns in determining the value of
the sense resistor Rs. The value of Rs should be small to
reduce power consumption, but it should be large enough
to maintain the resolution. A current transformer (CT)
may be used to improve the efficiency of high power
converters.
To achieve good power factor, the voltage for V
V
Equation 3. Good RC filtering for V
bandwidth (lower than the line frequency) for voltage
loop are suggested for better input current shaping. The
trans-conductance error amplifier has output impedance
Z
to ground. This establishes a dominant pole f1 for the
voltage loop.
O
EA
and a capacitor C
I
f
MO
1
should be kept as constant as possible according to
=
2
×
π
R
FIG.2 Line voltage detection circuit
×
2
Z
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=
1
O
MO
MO
I
S
S
×
C
goes negative with respect to ground.
×
.
and I
EA
EA
R
S
(1µF ~ 10µF) should be connected
--------------------
MR1
----------------------
. I
MR1
MR1
Product Specification
and I
and I
September 27, 2007
MR2
MR2
RMS
MO
are identical
are typically
and narrow
should not
SG6905
MP
RMS
, is the
(4)
(5)
and