IDT71321SA Integrated Device Technology, IDT71321SA Datasheet

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IDT71321SA

Manufacturer Part Number
IDT71321SA
Description
High Speed 2k X 8 Dual-port Static Ram With Interrupts
Manufacturer
Integrated Device Technology
Datasheet

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Features
Functional Block Diagram
NOTES:
1. IDT71321 (MASTER): BUSY is open drain output and requires pullup resistor of 270Ω.
2. Open drain output: requires pullup resistor of 270Ω.
©2008 Integrated Device Technology, Inc.
I/O
High-speed access
– Commercial: 20/25/35/55ns (max.)
– Industrial: 25/55ns (max.)
Low-power operation
– IDT71321/IDT71421SA
– IDT71321/421LA
Two INT flags for port-to-port communications
IDT71421 (SLAVE): BUSY is input.
0L
Active: 325mW (typ.)
Standby: 5mW (typ.)
Active: 325mW (typ.)
Standby: 1mW (typ.)
BUSY
- I/O
R/W
INT
A
OE
CE
A
10L
0L
7L
L
L
L
L
L
(1,2)
(2)
Decoder
Address
R/W
CE
OE
L
L
L
11
HIGH SPEED
2K X 8 DUAL-PORT
STATIC RAM
WITH INTERRUPTS
Control
I/O
ARBITRATION
INTERRUPT
MEMORY
ARRAY
LOGIC
and
1
MASTER IDT71321 easily expands data bus width to 16-or-
more-bits using SLAVE IDT71421
On-chip port arbitration logic (IDT71321 only)
BUSY output flag on IDT71321; BUSY input on IDT71421
Fully asynchronous operation from either port
Battery backup operation – 2V data retention (LA only)
TTL-compatible, single 5V ±10% power supply
Available in 52-Pin PLCC, 64-Pin TQFP, and 64-Pin STQFP
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
Control
I/O
11
Decoder
Address
CE
OE
R/W
R
R
R
IDT71321SA/LA
IDT71421SA/LA
OCTOBER 2008
2691 drw 01
OE
CE
R/W
I/O
BUSY
A
A
INT
10R
0R
0R
R
R
R
DSC-2691/13
R
(2)
-I/O
R
(1,2)
7R

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IDT71321SA Summary of contents

Page 1

... Available in 52-Pin PLCC, 64-Pin TQFP, and 64-Pin STQFP Industrial temperature range (–40°C to +85°C) is available for selected speeds Green parts available, see ordering information I/O I/O Control Control MEMORY ARRAY 11 11 ARBITRATION and INTERRUPT LOGIC 1 IDT71321SA/LA IDT71421SA/ R/W R I/O -I (1,2) BUSY R A 10R ...

Page 2

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Description The IDT71321/IDT71421 are high-speed Dual-Port Static RAMs with internal interrupt logic for interprocessor communications. The IDT71321 is designed to be used as a stand-alone 8-bit Dual- Port Static RAM "MASTER" Dual-Port Static RAM together with the IDT71421 " ...

Page 3

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Capacitance (1) (TA = +25° 1.0MHz) TQFP Only Symbol Parameter Conditions C Input Capacitance IN C Output Capacitance V OUT NOTES: 1. This parameter is determined by device characterization but is not production tested. 2. 3dv references the interpolated capacitance when the input and output signals switch from from ...

Page 4

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter CE and CE I Dynamic Operating CC L Current Outputs Disabled (2) (Both Ports Active MAX I Standby Current CE and CE SB1 L (2) ...

Page 5

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range (V Symbol Parameter ( Input Leakage Current LI ( Output Leakage Current LO V Output Low Voltage (I/O -I Open Drain Output V OL Low Voltage (BUSY/INT) ...

Page 6

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts AC Test Conditions Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load DATA OUT 775Ω Figure 1. AC Output Test Load BUSY or INT Figure 3. BUSY and INT AC Output Test Load GND to 3 ...

Page 7

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts AC Electrical Characteristics Over the Operating Temperature Supply Voltage Range Symbol READ CYCLE t Read Cycle Time RC t Address Access Time AA t Chip Enable Access Time ACE t Output Enable Access Time AOE ...

Page 8

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Timing Waveform of Read Cycle No. 1, Either Side ADDRESS DATA PREVIOUS DATA VALID OUT BUSY OUT NOTES and Address is valid prior to the coincidental with CE transition LOW ...

Page 9

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts AC Electrical Characteristics Over the Operating Temeprature and Supply Voltage Range Symbol WRITE CYCLE (2) t Write Cycle Time WC t Chip Enable to End-of-Write EW t Address Valid to End-of-Write AW t Address Set-up Time ...

Page 10

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Timing Waveform of Write Cycle No. 1, (R/W Controlled Timing) ADDRESS R/W DATA (4) OUT DATA IN Timing Waveform of Write Cycle No. 2, (CE Controlled Timing) ADDRESS CE ( R/W DATA IN NOTES must be HIGH during all address transitions. ...

Page 11

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol BUSY TIMING (For MASTER 71321) BUSY Access Time from Address t BAA BUSY Disable Time from Address t BDA BUSY Access Time from Chip Enable ...

Page 12

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Timing Waveform of Write with Port-to-Port Read and BUSY ADDR "A" R/W "A" DATA IN "A" (1) t APS ADDR "B" BUSY "B" DATA OUT"B" NOTES ensure that the earlier of the two ports wins ...

Page 13

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Timing Waveform of BUSY Arbitration Controlled by CE Timing ADDR "A" AND "B" CE "B" (2) t APS CE "A" BUSY "A" Timing Waveform of BUSY Arbritration Controlled by Address Match Timing ...

Page 14

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts AC Electrical Characteristics Over the Operating Temperature Supply Voltage Range Symbol INTERRUPT TIMING t Address Set-up Time AS t Write Recovery Time WR t Interrupt Set Time INS t Interrupt Reset Time INR NOTES: 1. 'X' in part numbers indicates power rating (SA or LA). ...

Page 15

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Truth Tables Truth Table I. Non-Contention Read/Write Control (1) Left or Right Port CE OE R DATA DATA NOTES: ≠ – A – 10R 0L 10L 2 ...

Page 16

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Functional Description The IDT71321/IDT71421 provides two ports with separate control, address and I/O pins that permit independent access for reads or writes to any location in memory. The IDT71321/IDT71421 has an automatic power down feature controlled by CE. The CE controls on-chip power ...

Page 17

... IDT71321SA/LA and IDT71421SA/LA High Speed Dual-Port Static RAM with Interrupts Ordering Information XXXX A 999 Device Type Power Speed Package NOTES: 1. Contact your sales office for industrial temperature range availability in other speeds, packages and powers. 2. Green parts available. For specific speeds, packages and powers contact your local sales office. ...

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