IDT71V2556S Integrated Device Technology, IDT71V2556S Datasheet - Page 22

• Manufacturer Part Number: IDT71V2556S
• Description: 128k X 36, 256k X 18 3.3v Synchronous Zbt Srams 2.5v I/o, Burst Counter Pipelined Outputs
• Manufacturer: Integrated Device Technology

NOTES:
1. Guaranteed by design.
2. AC Test Load (Fig. 1) on external output signals.
3. Refer to AC Test Conditions stated earlier in this document.
4. JTAG operations occur at one speed (10MHz). The base device may run at any speed specified in this datasheet.
JTAG Interface Specification (SA Version only)
JTAG AC Electrical
Characteristics
Device Outputs
NOTES:
1. Device inputs = All device inputs except TDI, TMS and TRST.
2. Device outputs = All device outputs except TDO.
3. During power up, TRST could be driven low or not be used since the JTAG circuit resets automatically. TRST is an optional JTAG reset.
IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs
Device Inputs
Symbol
t
t
t
JRSR
JCYC
t
t
JRST
t
t
JCH
JCL
t
t
JCD
JDC
t
t
JR
JF
JS
JH
TDI/TMS
TDO
TCK
TRST
JTAG Clock Input Period
JTAG Data Output Hold
JTAG Clock Rise Time
JTAG Reset Recovery
JTAG Clock Fall Time
(1)
(2)
JTAG Clock HIGH
JTAG Data Output
JTAG Clock Low
/
/
JTAG Reset
JTAG Setup
Parameter
JTAG Hold
( 3)
t
JF
(1,2,3,4)
t
JRST
t
JCL
Min.
t
100
t
____
____
____
40
40
50
50
25
25
JR
JRSR
0
t
JCYC
t
JS
Max.
5
5
____
____
____
____
____
____
____
____
20
(1)
(1)
t
JH
t
JCH
I4875 tbl 01
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
6.42
22
NOTE:
1. The Boundary Scan Descriptive Language (BSDL) file for this device is available
Instruction (IR)
Bypass (BYR)
JTAG Identification (JIDR)
Boundary Scan (BSR)
Scan Register Sizes
by contacting your local IDT sales representative.
Register Name
Commercial and Industrial Temperature Ranges
t
JDC
t
JCD
M4875 drw 01
Bit Size
Note (1)
32
4
1
I4875 tbl 03
x