ICL232 Intersil, ICL232 Datasheet - Page 4

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ICL232

Manufacturer Part Number
ICL232
Description
+5V Powered/ Dual RS-232 Transmitter/Receiver
Manufacturer
Intersil
Datasheet

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Pin Descriptions
Detailed Description
The ICL232 is a dual RS-232 transmitter/receiver powered by
a single +5V power supply which meets all ElA RS232C spec-
ifications and features low power consumption. The functional
diagram illustrates the major elements of the ICL232. The cir-
cuit is divided into three sections: a voltage doubler/inverter,
dual transmitters, and dual receivers Voltage Converter.
An equivalent circuit of the dual charge pump is illustrated in
Figure 5.
The voltage quadrupler contains two charge pumps which use
two phases of an internally generated clock to generate +10V
and -10V. The nominal clock frequency is 16kHz. During
phase one of the clock, capacitor C1 is charged to V
During phase two, the voltage on C1 is added to V
producing a signal across C2 equal to twice V
time, C3 is also charged to 2V
it is inverted with respect to ground to produce a signal across
C4 equal to -2V
voltages up to 5.5V. The output impedance of the doubler (V+)
is approximately 200Ω, and the output impedance of the
inverter (V-) is approximately 450Ω. Typical graphs are
presented which show the voltage converters output vs input
voltage and output voltages vs load characteristics. The test
circuit (Figure 3) uses 1µF capacitors for C1-C4, however, the
value is not critical. Increasing the values of C1 and C2 will
lower the output impedance of the voltage doubler and
inverter, and increasing the values of the reservoir capacitors,
C3 and C4, lowers the ripple on the V+ and V- supplies.
OSCILLATOR
PDIP, CERDIP
GND
V
CC
RC
11
12
13
14
15
16
CC
S1
S3
. The voltage converter accepts input
VOLTAGE DOUBLER
(Continued)
SOIC
C1
C1
CC
11
12
13
14
15
16
+
+
-
-
, and then during phase one,
C1
S2
S4
PIN NAME
R1
T1
R1
GND
T1
V
OUT
OUT
CC
CC
IN
IN
FIGURE 5. DUAL CHARGE PUMP
. At the same
+
-
C3
Transmitter 1 TTL/CMOS input, with internal 400K pullup resistor to V
Receiver 1 TTL/CMOS output.
RS-232 Receiver 1 input, with internal 5K pulldown resistor to GND.
RS-232 Transmitter 1 output ±10V (typical).
Supply Ground.
Positive Power Supply +5V ±10%
V
CC
CC
CC
ICL232
.
,
V+ = 2V
4
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic thresh-
old is about 26% of V
the input results in a voltage of between -5V and V- at the out-
put, and a logic 0 results in a voltage between +5V and (V+
- 0.6V). Each transmitter input has an internal 400kΩ pullup
resistor so any unused input can be left unconnected and its
output remains in its low state. The output voltage swing
meets the RS-232C specification of ±5V minimum with the
worst case conditions of: both transmitters driving 3kΩ mini-
mum load impedance, V
operating temperature. The transmitters have an internally
limited output slew rate which is less than 30V/µs. The outputs
are short circuit protected and can be shorted to ground indef-
initely. The powered down output impedance is a minimum of
GND
T1
CC
Instantaneous
Slew Rate (SR)
OUT
T1
IN
, T2
S5
S7
, T2
OUT
FIGURE 6. SLEW RATE DEFINITION
IN
VOLTAGE INVERTER
DESCRIPTION
t
C2
C2
=
f
CC
+
+
-
(0.8) (V
-
C2
CC
, or 1.3V for V
90%
10%
S6
S8
= 4.5V, and maximum allowable
OH
t
r
- V
OL
)
or
CC
t
+
r
-
(0.8) (V
C4
= 5V. A logic 1 at
OL
t
f
- V
GND
V- = -(V+)
CC
OH
V
V
.
OH
OL
)

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