DSP56371D Motorola Inc, DSP56371D Datasheet - Page 11
DSP56371D
Manufacturer Part Number
DSP56371D
Description
high density CMOS device
Manufacturer
Motorola Inc
Datasheet
1.DSP56371D.pdf
(102 pages)
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MOTOROLA
Note:
No.
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
Last SCK edge to SS not asserted
Data input valid to SCK edge (data
input set-up time)
SCK last sampling edge to data input
not valid
SS assertion to data out active
SS deassertion to data high
impedance
SCK edge to data out valid
(data out delay time)
SCK edge to data out not valid
(data out hold time)
SS assertion to data out valid
(CPHA = 0)
First SCK sampling edge to HREQ out-
put deassertion
Last SCK sampling edge to HREQ out-
put not deasserted (CPHA = 1)
SS deassertion to HREQ output not
deasserted (CPHA = 0)
SS deassertion pulse width (CPHA =
0)
HREQ in assertion to first SCK edge
HREQ in deassertion to last SCK sam-
pling edge (HREQ in set-up time)
(CPHA = 1)
First SCK edge to HREQ in not
asserted
(HREQ in hold time)
HREQ assertion width
1.
2.
V
Periodically sampled, not 100% tested
CORE_VDD
Table 7 Serial Host Interface SPI Protocol Timing (continued)
Characteristics
2
= 1.2 5 ± 0.05 V; T
Freescale Semiconductor, Inc.
For More Information On This Product,
1
DSP56371 Technical Data
Go to: www.freescale.com
J
= –40°C to 115°C for 150 MHz; T
Master/
Master/
Master/
Master/
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Serial Host Interface SPI Protocol Timing
0.5 × t
Expression
2 ×T
2×T
3×T
4×T
3×T
3×T
2xT
3 x T
T
T
C
C
—
—
—
—
—
—
C
C
C
C
C
SPICC
C
C
+9
+6
J
+10
+10
+30
+30
+30
+43
+10
= 0°C to 100°C for 181 MHz; C
C
+
Min
22.4
21.4
52.2
46.6
12.7
12
50
—
—
—
—
0
5
0
0
Max
15.0
100
—
—
—
—
—
—
—
—
—
—
—
—
9
L
= 50 pF
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
11
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