AN1139 STMicroelectronics, AN1139 Datasheet - Page 26

• Manufacturer Part Number: AN1139
• Description: L6254 - L6268 - L6269 12V DISK DRIVE POWER COMBO IC
• Manufacturer: STMicroelectronics

AN1139 APPLICATION NOTE
COARSE_REG = (0.9 * T0) / CoarseCounterPeriod = (0.9 * 11e-3) / 16e-6 = 618.75
The number 618 is the value that has to be programmed into the Coarse Counter Register. The decimal
number 0.75 is the error that needs to be added to the computation of the Fine Register.
5. Calculate Coarse Counter Error.
CoarseCounterError = 0.5 * CoarseCounterPeriod = 0.75 * 16e-6 = 12 S
6. Calculate Fine Register Value.
FINE_REG = (0.1*T0+CoarseCounterError) / CoarseCounterPeriod = (0.1*11e-3+12e-6) / 1e-6 = 1112
The number 1112 is the value that has to be programmed into the Fine Counter Register.
Figure 10. FLL LOOP
Since the Coarse Counter is a 12 bit counter, the maximum count available is 4096. Therefore, from the above
example, the full Coarse count set limit will be 65,536mS (4096*CoarseCounterPeriod). The Fine Counter is
only a 11 bit counter for a total of 2048 counts. The full Fine count set limit will be 2,048mS (2048*FineCounter-
Period). If a greater number will result from the calculation, the percentage of T0 used in the Fine Counter equa-
tion needs to be decreased and added to the Coarse Counter equations (for example , 91% of T0 goes into the
Coarse Counter and 9% of T0 goes into the fine Counter). This procedure needs to be repeated until the num-
ber will fit the Fine Counter Register. Figure #10 depicts the complete FLL loop block diagram.
4.4.1 Internal Frequency Feedback
The internal frequency for the Speed Loop Feedback is taken internally from the FCOM signal divided down by
3 and it is selectable by resetting (=0) the EXT/INT bit (Reg#2.7). The Figure#10 shows the configuration.
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R E F E R E N C E F R E Q U E N C Y G E N E R A T O R
T A C H O M E T E R S A M P L E
ZERO CROSS
SYS_CLK
INDEX
% 3
Spindle OTA
% 5
E X T / I NT = 0
E X T / I NT = 1
R e g # 2 . 7
V O L T A G E
I S N S R e g # 8 . 3
IL0 Reg#8.5
IL1 Reg#8.4
C L A M P
% 6 4
% 4
Electrical Period
8 / 1 2 P = 0 % 4
8 / 1 2 P = 1 % 6
R e g # 3 . 3
R e g # 4 . 0 : 7
R e g # 5 . 4 : 7
C o u n t e r
C o a r s e
FLL_FILTER
Loop Filter
External
PIN
Mechanical Period
R e g # 8 . 1
R e g # 8 . 1
I C P
I C P
R e g # 5 . 0 : 2
R e g # 6 . 0 : 7
G N D
V D D
R e g # 2 . 5
M E / E L = 0
M E / E L = 1
C o u n t e r
F i n e
F r e q u e n c y
F r e q u e n c y
Reference
F e e d b a c k
R e g # 8 . 7
R e g # 8 . 6
D O W N
C P H
C P L
U P
C o m p a r a t o r
F r e q u e n c y