UPD78F0138 NEC, UPD78F0138 Datasheet - Page 122
UPD78F0138
Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet
1.UPD78F0138.pdf
(558 pages)
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(3) Main clock mode register (MCM)
122
This register sets the CPU clock (X1 input clock/Ring-OSC clock).
MCM can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Address: FFA1H
Symbol
MCM
Note Bit 1 is read-only.
Cautions 1. When Ring-OSC clock is selected as the clock to be supplied to the CPU, the
MCM0
MCS
7
0
0
1
0
1
After reset: 00H
2. Set MCS = 1 and MCM0 = 1 before switching subsystem clock operation to X1
Figure 5-4. Format of Main Clock Mode Register (MCM)
Operates with Ring-OSC clock
Operates with X1 input clock
Ring-OSC clock
X1 input clock
divided clock of the Ring-OSC oscillator output (f
hardware (f
Operation of the peripheral hardware with Ring-OSC clock cannot be
guaranteed. Therefore, when Ring-OSC clock is selected as the clock supplied
to the CPU, do not use peripheral hardware. In addition, stop the peripheral
hardware before switching the clock supplied to the CPU from the X1 input clock
to the Ring-OSC clock. Note, however, that the following peripheral hardware
can be used when the CPU operates on the Ring-OSC clock.
• Watchdog timer
• Clock monitor
• 8-bit timer H1 when f
• Peripheral hardware selecting external clock as the clock source
input clock operation (bit 4 (CSS) of the processor clock control register (PCC)
is changed from 1 to 0).
(Except when external count clock of TM0n (n = 0, 1) is selected (TI00n valid
edge))
6
0
R/W
CHAPTER 5 CLOCK GENERATOR
X
= 240 kHz (TYP.)).
Note
User’s Manual U16228EJ2V0UD
5
0
R
Selection of clock supplied to CPU
/2
4
0
7
is selected as count clock
CPU clock status
3
0
2
0
X
) is supplied to the peripheral
MCS
<1>
MCM0
<0>
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