AN1356 STMicroelectronics, AN1356 Datasheet - Page 13
AN1356
Manufacturer Part Number
AN1356
Description
PSDSOFT EXPRESS AND PSD4235G2 DESIGN GUIDE
Manufacturer
STMicroelectronics
Datasheet
1.AN1356.pdf
(49 pages)
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AN1356 - APPLICATION NOTE
Figure 10. Chip Select Equations
Start with the internal chip-select for the PSD SRAM, which is “rs0”. Looking at the memory map of Figure
5, we see that 8 Kbytes (4 Kwords) of address space needs to be allocated to the PSD’s internal SRAM.
So, we enter the Start Address of 8000h and the End Address of 9FFFh as shown above. Notice that you
do not have to qualify the rs0 chip-select with any MCU control signals (_rd, _wrh, _wrl, _psen, etc)
because that is taken care of in silicon, just type in the addresses. This is true for all chip-selects of internal
PSD memory — no MCU control signal qualifiers are necessary. Also notice that the ‘Page Number’
selection is grayed out since we defined no page register bits in the previous screen.
Next, define the chip-select for the internal PSD control registers by clicking on “csiop” on the left side of
the screen. Enter its address range as shown:
Figure 11. CSIOP Address Range
Continue to define internal PSD memory chip-selects for the main Flash memory segments fs0 to fs7, and
then secondary Flash memory segments csboot0 to csboot3. Use Figure 5 as a guide for address ranges.
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