AN1356 STMicroelectronics, AN1356 Datasheet - Page 22

• Manufacturer Part Number: AN1356
• Description: PSDSOFT EXPRESS AND PSD4235G2 DESIGN GUIDE
• Manufacturer: STMicroelectronics

AN1356 - APPLICATION NOTE
Programming with FlashLINK™
Connect the FlashLINK™ JTAG-ISP cable to your PC parallel port. Click the ‘JTAG-ISP’ box in the design
flow window. You will be asked how many devices are in your JTAG chain. For this example, select ‘Only
One’. You would only select ‘More than One’ if you had more than one ISP device in your JTAG chain
(even non-ST JTAG devices may be included in the chain). You may choose to disable this question that
appears each time you enter the JTAG screen, and then turn it back on later using the ‘Preferences’ menu
choice from the ‘Project’ pull-down menu. Click OK after your selection, you should see the following
screen:
Figure 25. JTAG Chain Setup Window
This window enables you to perform JTAG-ISP operations and also offers a loop back test for your
™
FlashLINK
cable. If this is your first use, test your FlashLINK™ cable and PC parallel port by clicking the
HW Setup button, then click LoopTest button and follow the directions.
Now let’s define our JTAG-ISP environment. PSDsoft Express should have filled in the folder and filename
of the object file to program, the PSD device, and the JTAG-ISP operation, as shown in the screen above
in ‘Step 1’. For this design example, we have chosen to use all six JTAG-ISP pins (instead of four) so six
pins is automatically filled in. Using all six pins reduces programming time by 10%-15%. Refer to
Application Note 54 for details.
To begin programming, connect the JTAG cable to the target system, power-up the target system, and
click Execute on the JTAG screen in ‘Step 2’. The Log window at the bottom of the JTAG screen shows
the progress. You can choose to save all log messages to a file by clicking the ‘Log Mode’ box.
There are optional choices available when the Properties… button is clicked. One choice includes setting
the state of all non-JTAG PSD I/O pins during JTAG-ISP operations (make them inputs or outputs). The
default state of all non-JTAG PSD I/O pins is “input”, which is fine for this design example. The other
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