AN1356 STMicroelectronics, AN1356 Datasheet - Page 28

• Manufacturer Part Number: AN1356
• Description: PSDSOFT EXPRESS AND PSD4235G2 DESIGN GUIDE
• Manufacturer: STMicroelectronics

AN1356 - APPLICATION NOTE
For this second design example, we’ll implement the following logic elements to illustrate PSD
functionality:
The general tactic is to use the Graphic User Interface (GUI) of the Designs Assistant as much as possible
to create these logic functions before we have to manually edit the generated ABEL HDL file. You will see
that the GUI creates all of the necessary pin and signal declaration statements as well as some of the
simple logic equations. After this point, we will open the ABEL file and add more ABEL statements to
implement the state machine and down-counter.
Pin Definitions
To achieve this, let’s go back and define the remaining pin functions from the schematic of Figure 4. Click
on the ‘Define PSD Pin/Node Function’ box and add the following signals:
Your screen should look like this:
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4-state state machine with comparator feature.
Eight debounced inputs used for state machine input.
4-bit reloadable down-counter with initial value set by the MCU.
Simple clock divider circuit.
20 general purpose I/O pins controlled by MCU firmware.
PSD page register.
Miscellaneous combinatorial logic.
Define eight inputs on Port A that are clocked (sampled) as they enter the PSD. Choose Product Term
(PT) clocked register from the CPLD Input section, and name them “strobed_in_0” through
“strobed_in_7”. In silicon, these are IMCs.
Define a combinatorial CPLD output on Port B pin pb5. Choose Combinatorial from the CPLD Output
section and name it “zero”. Click Add.
Define a logic input to the CPLD on Port B pin pb6. Choose Logic or address from the CPLD Input
section name it “sys_ready”. Click Add.
Define a combinatorial CPLD output on Port B pin pb7. Choose Combinatorial from the CPLD Output
section and name it “sequence_OK”. Click Add.
Define eight MCU general purpose I/O signals on Port C. The MCU can set these pins to logic high or
low as outputs, or read the pins as inputs all through firmware at runtime. To set this up, choose MCUI/
O Mode from the Other section and name them “mcuio_pc0” through “mcuio_pc7”.
Define four MCU general purpose I/O signals on Port F. Choose MCUI/O Mode from the Other section
and name them “mcuio_pf4” through “mcuio_pf7”.
Define eight MCU general purpose I/O signals on Port G. Choose MCUI/O Mode from the Other section
and name them “mcuio_pg0” through “mcuio_pg7”.
Define a common PSD clock signal input on Port D pin pd1. Choose Common clock input, CLKIN in
the Other section.