DS90UR241Q National Semiconductor, DS90UR241Q Datasheet - Page 13
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DS90UR241Q
Manufacturer Part Number
DS90UR241Q
Description
(DS90UR124Q / DS90UR241Q) 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset
Manufacturer
National Semiconductor
Datasheet
1.DS90UR241Q.pdf
(26 pages)
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LVCMOS PARALLEL INTERFACE PINS
4-1,
48-44,
41-32,
29-25
10
www.DataSheet4U.com
Pin #
RxIN_TOL_L is the ideal noise margin on the left of the figure, with respect to ideal.
RxIN_TOL_R is the ideal noise margin on the right of the figure, with respect to ideal.
DS90UR241 Pin Diagram
DS90UR241 Serializer Pin Descriptions
D
TCLK
IN
Pin Name
[23:0]
LVCMOS_I
LVCMOS_I
I/O/PWR
FIGURE 17. Receiver Input Tolerance (RxIN_TOL) and Sampling Window
Transmitter Parallel Interface Data Input Pins. Tie LOW if unused, do not float.
Transmitter Parallel Interface Clock Input Pin. Strobe edge set by TRFB configuration pin.
Serializer - DS90UR241
TOP VIEW
13
Description
20194516
20194519
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