AN2008 Motorola / Freescale Semiconductor, AN2008 Datasheet

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AN2008

Manufacturer Part Number
AN2008
Description
Evaluating ColdFire in a 68K Target System: MCF5307 to MC68EC020 Gateway Reference Design
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.AN2008.pdf (20 pages)
Order Number: AN2008/D
Rev. 0, 7/2000
Semiconductor Products Sector
Application Note
®
Evaluating ColdFire
in a 68K Target System:
MCF5307 to MC68EC020 Gateway Reference
Design
Nigel Dick
Motorola Ltd., East Kilbride, Scotland
Motorola’s 68K family has been the market leader in embedded applications for many years. As a result of
this, there is a great wealth of experience in the industry surrounding the architecture. The highly
competitive nature of the embedded systems market compels designers to strive to find the best trade-off
between price and performance for microprocessors. Methods used by microprocessor manufacturers to
improve processor performance such as pipelining or increasing on-chip cache can be very expensive with
respect to silicon area. To overcome this problem and minimize cost with maximum performance, it may be
necessary to implement changes in the architecture. This can result in difficulties when a designer wishes to
upgrade their design. There may be implications for hardware and software compatibility which would not
be present if the architecture remained unmodified.
The ColdFire architecture has been designed specifically for high performance, cost sensitive embedded
applications. In doing this, the 68K architecture was analyzed and the way that embedded systems designers
use the architecture was examined. As a result, the features of the architecture used less frequently in
embedded system design were removed.
The ColdFire architectures' foundation in Motorola's 68000 architecture allows designers to take advantage
of the established tool support, code evolution, and engineering expertise. It uses a variable length RISC
instruction set to optimize both code density and allow one instruction to be issued every clock cycle where
possible. The ColdFire instruction set is a subset of the 68K instruction set, that is compatible at both
assembler and binary levels. The programming model is also identical to the 68K, with the exception that it
has a simplified stack pointer and exception stack frame.
This document contains information on a new product under development by Motorola.
Motorola reserves the right to change or discontinue this product without notice.
© Motorola, Inc., 2000. All rights reserved.

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AN2008 Summary of contents

Page 1

... This document contains information on a new product under development by Motorola. Motorola reserves the right to change or discontinue this product without notice. © Motorola, Inc., 2000. All rights reserved. ® 68K Target System: Order Number: AN2008/D Rev. 0, 7/2000 ...

Page 2

... Motorola has funded the development of an assembler code converter - PortASM/68K, written by MicroAPL Ltd. in the U.K. (Consult http://www.mot.com/SPS/HPESD/tools/companion.html This utility will run on either PC’s (under DOS, Windows 3.x, Windows95/98 & Windows NT) or Sun Workstations (under SunOS or Solaris) and is available free of charge via download from the web. This ...

Page 3

Design Considerations The MC68EC020 is a low-cost, (high performance) embedded derivative of the popular 32-bit MC68020 Microprocessor. The major differences between the MC68020 and the MC68EC020 is that the MC68EC020 has a 24-bit address bus and does not implement ...

Page 4

Design Considerations Clock Clock input multiplied PLL JTAG JTAG interface Master bus arbitration 4K SRAM Debug module BDM interface ColdFire module A key feature required for debugging a microprocessor system is memory. This allows the designer to download and run ...

Page 5

MC68EC020 PGA—MCF5307FT, Gateway Reference Design This section includes the following subsections: • MCF5307 CPU, Clock, RESET and BDM Circuit • RS232 Communications Port • MC5307FT Microprocessor Connection • FSRAM and Flash Memory Connections • PLL PSU and Initialization of ...

Page 6

MC68EC020 PGA—MCF5307FT, Gateway Reference Design The test mode signals on the MCF5307 microprocessor determine whether the device operates in BDM or JTAG test mode. The MTMOD0 is the key signal that determines this selection so the MTMOD[3:1] signals should be ...

Page 7

Pull-up resistors R5-R8 (10K) are required for stable FLASH operation and these are connected to /BYTE, RY/BY, RP and WP active low pins on the chip. The pull-up resistor attached to the /BYTE pin on the FLASH device sets the ...

Page 8

MC68EC020 PGA—MCF5307FT, Gateway Reference Design Alternatively, if both the transfer type and modifier pins are all de-asserted, the transfer modifier pins carry the interrupt level being acknowledged. Thus in this case, interrupt level 7 would be acknowledged. The bus is ...

Page 9

Jumper JP3 is used to select either on-module FLASH chip select or off-module user chip select. If the jumper is in position 2 /3, off-module user chip select is activated and the local FLASH chip select if the jumper is ...

Page 10

PALASM Control Equations for PAL U10 Appendix A PALASM Control Equations for PAL U10 TITLE U10_BUS_ARBITRATION PATTERN P00001 REVISION 1 DATE 5th March 1998 AUTHOR Pete Highton COMPANY Motorola SPS (c) 1998 CHIP U10 PALCE16V8 PIN 1 CLK PIN 2 ...

Page 11

Appendix B PALASM Control Equations for PAL U11 TITLE PATTERN REVISION DATE AUTHOR COMPANY CHIP U11 PALCE16V8 PIN 1 CLK PIN 2 /DSACK0 PIN 3 /DSACK1 PIN 4 /CS0 PIN 5 /CS1 PIN 6 /CS2 PIN 7 /CS3 PIN 8 ...

Page 12

Appendix C—Schematics ;----------------------------------- Simulation Segment ------------ SIMULATION TRACE_ON DSACK0 DSACK1 TA SETF /DSACK0 /DSACK1 CLOCKF CLK CLOCKF CLK SETF DSACK0 CLOCKF CLK CLOCKF CLK SETF /DSACK0 /DSACK1 CLOCKF CLK CLOCKF CLK SETF DSACK1 CLOCKF CLK CLOCKF CLK SETF /DSACK0 /DSACK1 ...

Page 13

MCF5307 to MC68EC020 Gateway Reference Design Appendix C—Schematics 13 ...

Page 14

Appendix C—Schematics 14 MCF5307 to MC68EC020 Gateway Reference Design ...

Page 15

MCF5307 to MC68EC020 Gateway Reference Design Appendix C—Schematics 15 ...

Page 16

Appendix C—Schematics 16 MCF5307 to MC68EC020 Gateway Reference Design ...

Page 17

MCF5307 to MC68EC020 Gateway Reference Design Appendix C—Schematics 17 ...

Page 18

Appendix C—Schematics 18 MCF5307 to MC68EC020 Gateway Reference Design ...

Page 19

MCF5307 to MC68EC020 Gateway Reference Design Appendix C—Schematics 19 ...

Page 20

... Technical Information Center: 1–800–521–6274 HOME PAGE: http://www.motorola.com/semiconductors Document Comments : FAX (512) 895-2638, Attn: RISC Applications Engineering World Wide Web Addresses : http://www.motorola.com/PowerPC http://www.motorola.com/NetComm http://www.motorola.com/ColdFire are registered trademarks of Motorola, Inc. Motorola, Inc Equal AN2008/D ...

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