FDC37B77X SMSC Corporation, FDC37B77X Datasheet - Page 8
FDC37B77X
Manufacturer Part Number
FDC37B77X
Description
ENHANCED SUPER I/O CONTROLLER WITH WAKE UP FEATURES
Manufacturer
SMSC Corporation
Datasheet
1.FDC37B77X.pdf
(196 pages)
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No./QFP
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
68:75
PIN
97
94
92
67
66
82
83
79
80
78
77
81
56
57
58
59
63
64
For 12 bit addressing, SA0:SA11 only, nCS should be tied to GND. For 16 bit external
address qualification, address bits SA11:SA15 can be "ORed" together and applied to nCS.
The nCS pin functions as SA11 in full 16 bit Internal Address Qualification Mode. CR24.6
controls the FDC37B77x addressing modes.
The "n" as the first letter of a signal name indicates an "Active Low" signal.
KBDRST is active low.
The pull-down on this pin is always active including when the output driver is tristated
and regardless of the state of internal PWRGOOD.
The “activate” bit for the CIrCC is reset by VTR POR only. The V
this pin is Logic “0”.
The “activate” bit for Serial Port 2 is reset by VTR POR only. The V
this pin is Logic “1”.
Data Set Ready 2/Sys Addr 15
Data Carrier Detect 2/8042 P12
Ring Indicator 2/8042 P16
Parallel Port Data Bus
Printer Select
Initiate Output
Auto Line Feed
Strobe Signal
Busy Signal
Acknowledge Handshake
Paper End
Printer Selected
Error at Printer
Keyboard Data
Keyboard Clock
Mouse Data
Mouse Clock
Keyboard Reset
Gate A20
KEYBOARD/MOUSE INTERFACE (6)
PARALLEL PORT INTERFACE (17)
NAME
DESCRIPTION OF PIN FUNCTIONS
8
TOTAL
1
1
1
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
nDSR2/
SA15
nDCD2/P12
nRI2/P16
PD[0:7]
nSLCTIN
nINIT
nALF
nSTROBE
BUSY
nACK
PE
SLCT
nERROR
KDAT
KCLK
MDAT
MCLK
KBDRST
(Note 3)
A20M
SYMBOL
CC
CC
power-up default for
power-up default for
OD24/O24
OD24/O24
OD24/O24
OD24/O24
BUFFER
IOD16
IOD16
IOD16
IOD16
I/IO24
I/IO24
TYPE
IO24
O4
O4
I/I
I
I
I
I
I
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