FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 35
FDC37C672QFP
Manufacturer Part Number
FDC37C672QFP
Description
ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer
SMSC Corporation
Datasheet
1.FDC37C672QFP.pdf
(173 pages)
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Enhanced Super I/O Controller with Fast IR
Datasheet
SMSC FDC37C672
BIT NO.
BIT NO.
BIT NO.
1,0
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
MA
CM
DD
WC
BC
MD
WP
T0
HD
DS1,0
SYMBOL
SYMBOL
SYMBOL
PRELIMINARY DATASHEET
Missing
Address Mark
Control Mark
Data Error in
Data Field
Wrong Cylinder
Bad Cylinder
Missing Data
Address Mark
Write Protected
Track 0
Head Address
Drive Select
NAME
NAME
NAME
Table 6.17 - Status Register 2
Table 6.18 - Status Register 3
Any one of the following:
1.
2.
Unused. This bit is always "0".
Any one of the following:
Read Data command - the FDC encountered a deleted data
address mark.
Read Deleted Data command - the FDC encountered a data
address mark.
The FDC detected a CRC error in the data field.
The track address from the sector ID field is different from the
track address maintained inside the FDC.
Unused. This bit is always "0".
Unused. This bit is always "0".
The track address from the sector ID field is different from the
track address maintained inside the FDC and is equal to FF
hex, which indicates a bad track with a hard error according to
the IBM soft-sectored format.
The FDC cannot detect a data address mark or a deleted data
address mark.
Unused. This bit is always "0".
Indicates the status of the WP pin.
Unused. This bit is always "1".
Indicates the status of the TRK0 pin.
Unused. This bit is always "1".
Indicates the status of the HDSEL pin.
Indicates the status of the DS1, DS0 pins.
Page 35
The FDC did not detect an ID address mark at the
specified track after encountering the index pulse from the
IDX pin twice.
The FDC cannot detect a data address mark or a deleted
data address mark on the specified track.
DESCRIPTION
DESCRIPTION
DESCRIPTION
Rev. 10-29-03
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