MIC5256 Micrel Semiconductor, MIC5256 Datasheet - Page 9
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MIC5256
Manufacturer Part Number
MIC5256
Description
150mA UCap LDO with Error Flag
Manufacturer
Micrel Semiconductor
Datasheet
1.MIC5256.pdf
(11 pages)
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MIC5256
Applications Information
Enable/Shutdown
The MIC5256 comes with an active-high enable pin that
allows the regulator to be disabled. Forcing the enable pin low
disables the regulator and sends it into a “zero” off-mode-
current state. In this state, current consumed by the regulator
goes nearly to zero. Forcing the enable pin high enables the
output voltage. This part is CMOS and the enable pin cannot
be left floating; a floating enable pin may cause an indetermi-
nate state on the output.
Input Capacitor
The MIC5256 is a high performance, high bandwidth device.
Therefore, it requires a well-bypassed input supply for opti-
mal performance. A 1 F capacitor is required from the input
to ground to provide stability. Low ESR ceramic capacitors
provide optimal performance at a minimum of space. Addi-
tional high-frequency capacitors, such as small valued NPO
dielectric type capacitors, help filter out high frequency noise
and are good practice in any RF based circuit.
Output capacitor
The MIC5256 requires an output capacitor for stability. The
design requires 1 F or greater on the output to maintain
stability. The design is optimized for use with low ESR
ceramic chip capacitors. High ESR capacitors may cause
high frequency oscillation. The maximum recommended
ESR is 300m . The output capacitor can be increased, but
performance has been optimized for a 1 F ceramic output
capacitor and does not improve significantly with larger
capacitance.
X7R/X5R dielectric-type ceramic capacitors are recom-
mended because of their temperature performance. X7R-
type capacitors change capacitance by 15% over their oper-
ating temperature range and are the most stable type of
ceramic capacitors. Z5U and Y5V dielectric capacitors change
value by as much as 50% and 60% respectively over their
operating temperature ranges. To use a ceramic chip capaci-
tor with Y5V dielectric, the value must be much higher than an
X7R ceramic capacitor to ensure the same minimum capaci-
tance over the equivalent operating temperature range.
Error Flag
The error flag output is an active-low, open-drain output that
drives low when a fault condition AND an undervoltage
detection occurs. Internal circuitry intelligently monitors
overcurrent, overtemperature and dropout conditions and
ORs these outputs together to indicate some fault condition.
The output of that OR gate is ANDed with an output voltage
monitor that detects an undervoltage condition. That output
drives the open-drain transistor to indicate a fault. This
prevents chattering or inadvertent triggering of the error flag.
The error flag must be pulled-up using a resistor from the flag
pin to either the input or the output.
The error flag circuit was designed essentially to work with a
capacitor to ground to act as a power-on reset generator,
signaling a power-good situation once the regulated voltage
was up and/or out of a fault condition. This capacitor delays
the error signal from pulling high, allowing the down stream
circuits time to stablilize. When the error flag is pulled-up to
June 2003
9
the input without using a pull-down capacitor, then there can
be a glitch on the error flag upon start up of the device. This
is due to the response time of the error flag circuit as the
device starts up. When the device comes out of the “zero” off
mode current state, all the various nodes of the circuit power
up before the device begins supplying full current to the
output capacitor. The error flag drives low immediately and
then releases after a few microseconds. The intelligent circuit
that triggers an error detects the output going into current limit
AND the output being low while charging the output capacitor.
The error output then pulls low for the duration of the turn-on
time. A capacitor from the error flag to ground will filter out this
glitch. The glitch does not occur if the error flag pulled up to
the output.
Active Shutdown
The MIC5256 also features an active shutdown clamp, which
is an N-channel MOSFET that turns on when the device is
disabled. This allows the output capacitor and load to dis-
charge, de-energizing the load.
No Load Stability
The MIC5256 will remain stable and in regulation with no load
unlike many other voltage regulators. This is especially
important in CMOS RAM keep-alive applications.
Thermal Considerations
The MIC5256 is designed to provide 150mA of continuous
current in a very small package. Maximum power dissipation
can be calculated based on the output current and the voltage
drop across the part. To determine the maximum power
dissipation of the package, use the junction-to-ambient ther-
mal resistance of the device and the following basic equation:
T
125 C, and T
layout dependent; Table 1 shows examples of junction-to-
ambient thermal resistance for the MIC5256.
The actual power dissipation of the regulator circuit can be
determined using the equation:
Substituting P
conditions that are critical to the application will give the
maximum operating conditions for the regulator circuit. For
example, when operating the MIC5256-3.0BM5 at 50 C with
a minimum footprint layout, the maximum input voltage for a
set output current can be determined as follows:
J(max)
Package
SOT-23-5
(M5 or D5)
P
P
P
P
D(max)
D(max)
D
D(max)
is the maximum junction temperature of the die,
Table 1. SOT-23-5 Thermal Resistance
= (V
A
IN
Minimum Footprint
= 315mW
D(max)
JA
is the ambient operating temperature.
– V
125 C 5 C
T
Recommended
J(max)
235 C/W
235 C/W
OUT
for P
JA
) I
OUT
T
0
D
A
and solving for the operating
+ V
IN
I
Copper Clad
JA
GND
185 C/W
1" Square
145 C/W
MIC5256
Micrel
JC
JA
is