SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 215
SPC8106
Manufacturer Part Number
SPC8106
Description
LCD/CRT VGA CONTROLLER
Manufacturer
S-MOS Systems
Datasheet
1.SPC8106.pdf
(432 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SPC8106F0C
Manufacturer:
EPSON
Quantity:
912
Company:
Part Number:
SPC8106FOB
Manufacturer:
EPSON
Quantity:
430
Company:
Part Number:
SPC8106FOC
Manufacturer:
OMRON
Quantity:
2 000
- Current page: 215 of 432
- Download datasheet (2Mb)
B.3 Software Power Save Mode 3
B.4 Software Power Save Mode 4
SPC8106
State 2
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
411-1.0
No video display accesses to display memory.
No CPU accesses to/from display memory.
Sequencer is halted.
I/O read/write of all registers is allowed.
/LCDPWR signal forced high, IREFCNT is forced high.
LCD interface output signals are low by default, but can be changed by 8106CFG.EXE.
The External RAMDAC will be forced by software to a sleep state whether in LCD, CRT or Simultaneous
Display mode.
No video display accesses to display memory.
No CPU accesses to/from display memory.
Sequencer is halted.
No display memory refresh.
/LCDPWR signal forced high, IREFCNT is forced high.
LCD interface output signals are low by default, but can be changed by 8106CFG.EXE.
The External RAMDAC will be forced by software to a sleep state whether in LCD, CRT or Simultaneous
Display mode.
Disable Address decoding, allow access to Auxiliary Ports only.
No video display accesses to display memory.
No CPU accesses to/from display memory.
Sequencer is halted.
/LCDPWR signal forced high, IREFCNT is forced high.
LCD interface output signals are low by default, but can be changed by 8106CFG.EXE.
The External RAMDAC will be forced by software to a sleep state whether in LCD, CRT or Simultaneous
Display mode.
Display memory refresh is maintained and is generated from one of 3 selectable sources: 1) from the active
CLKI input (28 MHz for LCD, 25 MHz or 28 MHz for CRT), 2) from the PDCLK pin (32 kHz 50% duty cycle, or
64 kHz with short low pulse duration), 3) or for ISA bus configuration only, from a clock source connected to
pin MEMEN.
Refresh rate generated from CLKI can be selected: 64 kHz or 8 kHz, (for 256 cycle/4 ms, or 256 cycle/32 ms
DRAM, respectively).
Refresh rate generated from MEMEN or PDCLK can also be selected: 64 kHz or 8 kHz, (for 256 cycle/4 ms,
or 256 cycle/32 ms DRAM, respectively).
Disable Address decoding, allow access to Auxiliary Ports only.
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
X12-SP-002-03.1
BIOS Functional Specification
SP2-45
Related parts for SPC8106
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CMOS 256K-Bit Static RAM
Manufacturer:
S-MOS Systems
Datasheet:
Part Number:
Description:
VGA LCD CONTROLLER
Manufacturer:
S-MOS Systems
Datasheet:
Part Number:
Description:
CMOS 256K-Bit Static RAM
Manufacturer:
S-MOS Systems
Datasheet: