LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 138
LM3S6110
Manufacturer Part Number
LM3S6110
Description
Lm3s6110 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6110.pdf
(472 pages)
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General-Purpose Input/Outputs (GPIOs)
8
8.1
138
General-Purpose Input/Outputs (GPIOs)
The GPIO module is composed of seven physical GPIO blocks, each corresponding to an individual
GPIO port (Port A, Port B, Port C, Port D, Port E, Port F, and Port G, ). The GPIO module supports
8-35 programmable input/output pins, depending on the peripherals being used.
The GPIO module has the following features:
■
■
■
■
■
Functional Description
Important:
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure
8-1 on page 139). The LM3S6110 microcontroller contains seven ports and thus seven of these
physical GPIO blocks.
Programmable control for GPIO interrupts
–
–
–
5-V-tolerant input/outputs
Bit masking in both read and write operations through address lines
Pins configured as digital inputs are Schmitt-triggered.
Programmable control for GPIO pad configuration:
–
–
–
–
–
Interrupt generation masking
Edge-triggered on rising, falling, or both
Level-sensitive on High or Low values
Weak pull-up or pull-down resistors
2-mA, 4-mA, and 8-mA pad drive for digital communication; up to four pads can be configured
with an 18-mA pad drive for high-current applications
Slew rate control for the 8-mA drive
Open drain enables
Digital input enables
All GPIO pins are tri-stated by default (GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0,
and GPIOPUR=0), with the exception of the five JTAG/SWD pins (PB7 and PC[3:0]).
The JTAG/SWD pins default to their JTAG/SWD functionality (GPIOAFSEL=1,
GPIODEN=1 and GPIOPUR=1). A Power-On-Reset (POR) or asserting RST puts both
groups of pins back to their default state.
Preliminary
July 25, 2008
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