LM3S6911 Luminary Micro, Inc, LM3S6911 Datasheet - Page 439
LM3S6911
Manufacturer Part Number
LM3S6911
Description
Lm3s6911 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6911.pdf
(502 pages)
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July 26, 2008
Pin Name
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
GNDPHY
GNDPHY
GNDPHY
GNDA
GNDA
LED0
LED1
MDIO
OSC0
OSC1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HIB
LDO
PA0
PA1
PA2
Pin Number
15
21
33
39
45
54
57
63
69
82
87
94
97
42
85
86
51
70
71
34
35
59
60
58
48
49
26
27
28
9
4
7
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
Buffer Type
Analog
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
OD
OD
Description
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
GND of the Ethernet PHY
GND of the Ethernet PHY
GND of the Ethernet PHY
An output that indicates the processor is in
hibernate mode.
I2C module 0 clock
I2C module 0 data
I2C module 1 clock
I2C module 1 data
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
MII LED 0
MII LED 1
MDIO of the Ethernet PHY
Main oscillator crystal input or an external
clock reference input.
Main oscillator crystal output.
GPIO port A bit 0
GPIO port A bit 1
GPIO port A bit 2
LM3S6911 Microcontroller
439
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