LM3S8930 Luminary Micro, Inc, LM3S8930 Datasheet - Page 122
LM3S8930
Manufacturer Part Number
LM3S8930
Description
Lm3s8930 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S8930.pdf
(526 pages)
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Hibernation Module
7.2.7
7.3
7.3.1
122
register (see “Interrupts and Status” on page 122) and by looking for state data in the non-volatile
memory (see “Non-Volatile Memory” on page 121).
When the HIB signal deasserts, enabling the external regulator, the external regulator must reach
the operating voltage within t
Interrupts and Status
The Hibernation module can generate interrupts when the following conditions occur:
■
■
■
All of the interrupts are ORed together before being sent to the interrupt controller, so the Hibernate
module can only generate a single interrupt request to the controller at any given time. The software
interrupt handler can service multiple interrupt events by reading the HIBMIS register. Software can
also read the status of the Hibernation module at any time by reading the HIBRIS register which
shows all of the pending events. This register can be used at power-on to see if a wake condition
is pending, which indicates to the software that a hibernation wake occurred.
The events that can trigger an interrupt are configured by setting the appropriate bits in the HIBIM
register. Pending interrupts can be cleared by writing the corresponding bit in the HIBIC register.
Initialization and Configuration
The Hibernation module can be set in several different configurations. The following sections show
the recommended programming sequence for various scenarios. The examples below assume that
a 32.768-kHz oscillator is used, and thus always show bit 2 (CLKSEL) of the HIBCTL register set
to 1. If a 4.194304-MHz crystal is used instead, then the CLKSEL bit remains cleared. Because the
Hibernation module runs at 32 kHz and is asynchronous to the rest of the system, software must
allow a delay of t
Timing” on page 118). The registers that require a delay are listed in a note in “Register Map” on page
123 as well as in each register description.
Initialization
The clock source must be enabled first, even if the RTC will not be used. If a 4.194304-MHz crystal
is used, perform the following steps:
1.
2.
If a 32.678-kHz oscillator is used, then perform the following steps:
1.
2.
The above is only necessary when the entire system is initialized for the first time. If the processor
is powered due to a wake from hibernation, then the Hibernation module has already been powered
Assertion of WAKE pin
RTC match
Low battery detected
Write 0x40 to the HIBCTL register at offset 0x10 to enable the crystal and select the divide-by-128
input path.
Wait for a time of t
other operations with the Hibernation module.
Write 0x44 to the HIBCTL register at offset 0x10 to enable the oscillator input.
No delay is necessary.
HIB_REG_WRITE
XOSC_SETTLE
HIB_TO_VDD
after writes to certain registers (see “Register Access
for the crystal to power up and stabilize before performing any
Preliminary
.
July 25, 2008
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