LM3S2918 Luminary Micro, Inc, LM3S2918 Datasheet - Page 282
LM3S2918
Manufacturer Part Number
LM3S2918
Description
Lm3s2918 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S2918.pdf
(533 pages)
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Reset
Reset
Type
Type
Analog-to-Digital Converter (ADC)
ADC Underflow Status (ADCUSTAT)
Base 0x4003.8000
Offset 0x018
Type R/W1C, reset 0x0000.0000
282
Bit/Field
31:4
3
2
1
0
RO
RO
31
15
0
0
Register 7: ADC Underflow Status (ADCUSTAT), offset 0x018
This register indicates underflow conditions in the Sample Sequencer FIFOs. The corresponding
underflow condition can be cleared by writing a 1 to the relevant bit position.
RO
RO
30
14
0
0
reserved
RO
RO
29
13
0
0
Name
UV3
UV2
UV1
UV0
RO
RO
28
12
0
0
RO
RO
27
11
0
0
R/W1C
R/W1C
R/W1C
R/W1C
Type
RO
RO
RO
26
10
0
0
reserved
Reset
0x00
RO
RO
25
0
9
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SS3 FIFO Underflow
This bit specifies that the FIFO for Sample Sequencer 3 has hit an
underflow condition where the FIFO is empty and a read was requested.
The problematic read does not move the FIFO pointers, and 0s are
returned. This bit is cleared by writing a 1.
SS2 FIFO Underflow
This bit specifies that the FIFO for Sample Sequencer 2 has hit an
underflow condition where the FIFO is empty and a read was requested.
The problematic read does not move the FIFO pointers, and 0s are
returned. This bit is cleared by writing a 1.
SS1 FIFO Underflow
This bit specifies that the FIFO for Sample Sequencer 1 has hit an
underflow condition where the FIFO is empty and a read was requested.
The problematic read does not move the FIFO pointers, and 0s are
returned. This bit is cleared by writing a 1.
SS0 FIFO Underflow
This bit specifies that the FIFO for Sample Sequencer 0 has hit an
underflow condition where the FIFO is empty and a read was requested.
The problematic read does not move the FIFO pointers, and 0s are
returned. This bit is cleared by writing a 1.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
R/W1C
UV3
RO
19
0
3
0
R/W1C
UV2
RO
18
0
2
0
July 26, 2008
R/W1C
UV1
RO
17
0
1
0
R/W1C
UV0
RO
16
0
0
0
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