LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 578
LM3S5652
Manufacturer Part Number
LM3S5652
Description
Lm3s5652 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S5652.pdf
(703 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LM3S5652-IQR50-A0
Manufacturer:
Texas Instruments
Quantity:
10 000
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Part Number:
LM3S5652-IQR50-A0T
Manufacturer:
Texas Instruments
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Reset
Type
Univeral Serial Bus (USB) Controller
USB Receive Hub Address Endpoint 1 (USBRXHUBADDR1)
Base 0x4005.0000
Offset 0x08E
Type R/W, reset 0x00
578
Host
Bit/Field
MULTTRAN
6:0
R/W
7
7
0
R/W
Register 40: USB Receive Hub Address Endpoint 1 (USBRXHUBADDR1),
offset 0x08E
Register 41: USB Receive Hub Address Endpoint 2 (USBRXHUBADDR2),
offset 0x096
Register 42: USB Receive Hub Address Endpoint 3 (USBRXHUBADDR3),
offset 0x09E
USBRXHUBADDRn is an 8-bit read/write register that, like USBRXHUBPORTn, only needs to be
written when a full- or low-speed device is connected to receive endpoint EPn via a high-speed USB
2.0 hub. This register provides the necessary transaction translation to convert between high-speed
transmission and full-/low-speed transmission. This register records the address of that USB 2.0
hub through which the target associated with the endpoint is accessed. This information, together
with the hub port in USBRXHUBPORTn, allows the USB controller to support split transactions.
Note:
6
0
MULTTRAN
R/W
5
0
ADDR
Name
USBTXHUBADDR0 is used for both receive and transmit for endpoint 0.
R/W
4
0
ADDR
R/W
3
0
Type
R/W
R/W
R/W
2
0
R/W
Reset
0x00
1
0
0
Preliminary
R/W
0
0
Description
Multiple Translators
Indicates whether the hub has multiple transaction translators. Clear to
0 if single transaction translator; set to 1 if multiple transaction translators.
Hub Address
USB bus address for the USB 2.0 hub.
June 02, 2008
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