XC2VP70 Xilinx, Inc., XC2VP70 Datasheet - Page 110

• Manufacturer Part Number: XC2VP70
• Description: Virtex-ii Pro Field Programmable Gate Array
• Manufacturer: Xilinx, Inc.

Virtex-II Pro Data Sheet
The Virtex-II Pro Data Sheet contains the following modules:
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DS083-3 (v2.12) November 11, 2003
Advance Product Specification
10/14/03
11/10/03
Virtex-II Pro™ Platform FPGAs: Introduction and
Overview (Module 1)
Virtex-II Pro™ Platform FPGAs: Functional Description
(Module 2)
Date
R
Version
2.11
2.12
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Table
or more banks operated at 3.3V. Changed T
temperature” to “Maximum junction temperature”. Added new Footnote (2) linking to
website for package thermal data.
Table 4
devices through XC2VP70. Added Industrial Grade multiplier specification to Footnote
(1) in both tables.
In section
11713 with reference to
outputs (SSO).
In section
-
-
-
-
Table
Footnote (2) to new Footnote (3).
Table
footnote referring to XAPP659.
Table
Table 31
Added new
Replaced
Revised and extended text describing output delay measurement procedure.
1: Deleted Footnote (2), which had derated the absolute maximum T
49: For Input Clock Low/High Pulse Width, PSCLK and CLKIN, changed existing
1: Changed 3.3V absolute max V
4: Removed MIN column from table.
and
General Power Supply
I/O Standard Adjustment Measurement
Table
renamed
Figure
Table
Virtex-II Pro™ Platform FPGAs: DC and Switching Characteristics
5: Filled in power-on and quiescent current parameters for all
www.xilinx.com
1-800-255-7778
6,
32,
Input Delay Measurement
Generalized Test
XAPP689
Output Delay Measurement
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Virtex-II Pro™ Platform FPGAs: DC and Switching
Characteristics (Module 3)
Virtex-II Pro™ Platform FPGAs: Pinout Information
(Module 4)
Requirements, replaced reference to Answer Record
regarding handling of simultaneously switching
Revision
IN
Setup, with new drawing.
and V
J
description from “Operating junction
TS
Methodology. Added footnotes.
Methodology:
from 3.75V to 4.05V. Added
Methodology.
J
when one
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