C1851BCU NEC, C1851BCU Datasheet
C1851BCU
Related parts for C1851BCU
C1851BCU Summary of contents
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... TV sets and VCRs for north America ORDERING INFORMATION Part Number PC1851BCU The PC1851B is available only to licensees of THAT Corporation. For information, please call: (508) 229-2500 (U.S.A), or (03) 5790-5391 (Tokyo). The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version ...
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SYSTEM BLOCK DIAGRAM TV Tuner DTS interface SCL Tuning microcontroller SDA Remote controller receive amp. PIN photodiode and ...
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BLOCK DIAGRAM 2.2 F TLO 2200 pF LTC 0.1 F LBC FOR FOL EL2 EL1 ER2 ER1 MOL MOR MOA 22 F VRE PD2 0.1 F PD1 ...
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STEREO DEMODULATION BLOCK From Input Attenuator Stereo LPF SAP DEMODULATION BLOCK From Input Attenuator To Noise BPF SOA 12 SDT PD1 PD2 D/A Stereo Phase Stereo Comparator VCO Pilot Discrimination Phase ...
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NOISE REDUCTION BLOCK From Switch LPF f Trap H 408-Hz LPF Variable Emphasis 2.19-kHz LPF Offset Absorption 18 dO SELECTOR BLOCK From Matrix Block (L-channel signal) From Matrix Block (R-channel signal) Notes 1. Switch (TV signal/External input 1/External ...
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SURROUND BLOCK From Selector Block (L-channel) From Selector Block (R-channel Tone Control Block – – Phase Shifter + To Tone Control Block 27 SUR Data Sheet S13417EJ2V0DS00 PC1851B ...
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... PIN CONFIGURATION (Top View) 42-pin plastic SDIP (15.24 mm (600)) • PC1851BCU Power Supply ( Vcc Filter 2 Pilot Discrimination Filter 1 Pilot Discrimination Filter 2 Phase Comparator Filter 1 Phase Comparator Filter 2 Composite Signal Input SAP Discrimination Filter Noise Detector Filter SAP Single Output SAP Single Input ...
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PIN EQUIVALENT CIRCUITS ............................................................................................ 9 2. BLOCK FUNCTIONS ........................................................................................................ 18 2.1 Stereo Demodulation Block ................................................................................... 18 2.2 SAP Demodulation Block ...................................................................................... 19 2.3 dbx Noise Reduction Block ................................................................................... 20 2.4 Matrix Block ............................................................................................................ 21 2.5 Selector Block ........................................................................................................ ...
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PIN EQUIVALENT CIRCUITS Pin No. Pin Name 1 Power Supply ( Filter Pilot Discrimination Filter 1 4 Pilot Discrimination Filter 2 Symbol Internal Equivalent Circuit V CC VRE ...
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Pin No. Pin Name 5 Phase Comparator Filter 1 6 Phase Comparator Filter 2 7 Composite Signal Input 8 SAP Discrimination Filter 10 Symbol Internal Equivalent Circuit ...
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Pin No. Pin Name 9 Noise Detector Filter 10 SAP Single Output Symbol Internal Equivalent Circuit NDT SOT 2 k 200 2 k Data Sheet S13417EJ2V0DS00 PC1851B (3/9) 9 ...
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Pin No. Pin Name 11 SAP Single Input 12 SAP Offset Absorption 13 Spectral RMS Timing 12 Symbol Internal Equivalent Circuit SOA 2 STI ...
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Pin No. Pin Name 14 Spectral RMS Offset Absorption 15 Timing Current Setting 16 Wide-band RMS Timing 17 Wide-band RMS Offset Absorption 18 Variable Emphasis Offset Absorption Symbol Internal Equivalent Circuit SRB ...
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Pin No. Pin Name 19 Volume Control Offset Absorption 20 VCA Offset Absorption 21 Analog GND Note 2 22 SDA (for I C bus) Note 2 23 SCL (for I C bus Digital GND (for I C ...
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Pin No. Pin Name 25 R-channel Output 26 L-channel Output 27 Surround Timing 28 R-channel Offset Absorption Symbol Internal Equivalent Circuit ROT 10 k 200 200 LOT Same as pin 25 SUR ...
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Pin No. Pin Name 29 R-channel Capacity of High Frequency Band Width 30 R-channel Capacity of Low Frequency Band Width 31 L-channel Offset Absorption 32 L-channel Capacity of High Frequency Band Width 33 L-channel Capacity of Low Frequency Band ...
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Pin No. Pin Name 36 External R-channel Input 2 37 External L-channel Input 2 38 External R-channel Input 1 39 External L-channel Input 1 40 R-channel Fixed Output 41 L-channel Fixed Output 42 Monaural Offset Absorption Symbol Internal Equivalent ...
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... LPF. The two signals differ from each other by 90 degrees in terms of phase. The resistor and capacitor connected to the D1 and D2 pins form a filter that smoothes the phase error signal output from the Stereo Phase Comparator, converting the error signal to the DC voltage. When the voltage difference ...
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... The sensitivity and time constant of the circuit are adjusted by setting the values of the resistor and capacitor connected to the NDT pin. (4) SAP Detector Detects the signal from the SAP BPF and smoothes it through the SDT pin and inputs it to the comparator. When it detects the SAP signal, the SAP broadcast (Broadcast status) (Read register, bit D5) turns “ ...
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Noise Reduction Block All the filters required for TV-dbx Noise Reduction are incorporated. These filter responses are adjusted by setting all the FILTER SETTING bits (Write register, subaddress 02H, bits D0 to D5). (1) LPF This LPF ...
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... Wide-band RMS Detects the RMS value of the signal passed through the wide-band RMS filter, and converts the signal to the DC voltage. The release time is set by adjusting the current I capacitor connected to the WTI pin. The current I 2.4 Matrix Block (1) Matrix Adds L+R signal and L–R signal to output L signal, and substracts L+R signal from L–R signal to output R signal. ...
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I C BUS INTERFACE The PC1851B uses a 2-wire serial bus developed by Philips. The serial clock line (SCL) and serial data line (SDA) employ the 2-wire configuration as shown in Figure 3-1. 2 The PC1851B contains ...
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Data Transfer (1) Start condition The start condition is created when SDA changes from high to low while SCL is high, as shown in Figure 3-2. When the PC1851B receives this information, it captures data sent in synchronization ...
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3.2 Data Transfer Format An example of data transfer in the write mode is shown in Figure 3-4. Figure 3-4. Data ...
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The format for 1-byte data transfer is the following: Slave Write Start address mode (2) Continuous data transfer The format when transferring multiple (7) bytes of data at one time by using the automatic increment ...
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Automatic increment The PC1851B has the automatic increment function. The automatic increment is applied to the subaddresses 00H to 05H of the write register. The user can set ON/OFF the automatic increment of the subaddresses 06H to 0AH ...
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I C BUS COMMANDS 4.1 Subaddress List (1) Write register (command list) Bit MSB Sub- D7 address 00H 0 During noise detection Stereo/SAP output stop 0: SAP OFF 1: Stereo, 01H ON/OFF 0: OFF ...
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Note Output when SAP1 or SAP2 is selectd is as follows: L-channel output (LOT pin) SAP1 SAP2 Monaural (L+R) (2) Read register MSB D7 D6 Broadcast status Power-on reset Stereo pilot 0: Not available 0: Not available 1: Detect ...
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... Write “1” to bit D0 (Mute: OFF) of subaddress 06H. <2> Write “1” to bit D6 (f <3> Connect frequency counter to FOR pin, and set bits (STEREO VCO SETTING bits) of subaddress 01H so that frequency counter displays 15.73 kHz ( 0.1 kHz). <4> When setting is completed, write “0” to bit D6 (f Table 4-1 ...
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... Write “1” to bit monitor: ON) of subaddress 05H. H <4> Connect a frequency counter to the FOR pin, and set bits subaddress 05H (SAP VCO SETTING bits) so that 78.67 kHz ( 0.5 kHz) is displayed on the frequency counter. <5> When setting is completed, write “0” to bit < ...
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Explanation of Write Register (1) Stereo/SAP output stop function during noise detection Stereo/SAP output stop can be selected with the data of bit D6 of subaddress 00H during weak electrical field conditions (recommended noise level during circuit use ...
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Mode switch (L-, R-channel output (LOT, ROT pins)) The output signal for the L- and R-channel outputs (LOT, ROT pins) can be selected with bits subaddress 06H. For the combinations of data of each ...
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Input select The signal to be input to the selector block in the PC1851B can be selected by the data of bits subaddress 06H. The selected signal is output from the LOT, ROT, FOL ...
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Input gain The gain of the signal to be input to the selector block in the PC1851B can be selected by the data of bit D6 of subaddress 03H 03H 0 Input gain (6) Surround function ...
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Volume, Balance control The volume and balance of the output (LOT and ROT pins) can be controlled at 64 levels by the data of bits subaddresses 07H and 08H. The volume attenuation is 80 ...
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Bass, Treble control The bass and treble sound quality of the output (LOT and ROT pins) can be controlled at 64 levels by the data of the bits subaddresses 09H and 0AH. The bass ...
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Automatic increment function The automatic increment function ON/OFF can be selected by the data of bit D7 of subaddress 06H and that of bit D6 of subaddresses 07H to 0AH. For the details of the automatic increment function, ...
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Explanation of Read Register (1) Power-on reset detection Whether a power-on reset was detected is detected with bit D7 of the read register Broadcast status Power-on Stereo reset broadcast Power-on reset detection 1 Power-on reset detection ...
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Stereo, SAP broadcast reception (reception status) detection Whether SAP or stereo broadcast is being received and the PC1851B outputs the audio signal can be detected with bits D2 and D3 of the read register. The register data become ...
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MODE MATRIX Mute OFF (Write register, subaddress 06H, bit D0 : “1”) (1) Read register, bit D4: 0 Broadcast Write Register mode Forced Stereo monaural /SAP ON/OFF switch Subaddress 06H Bit D1 Bit D2 Monaural – – Stereo ...
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... External input 1 (L) 10 External input 2 (L) 11 Setting prohibited (no signal, unconnected External input 1 10 External input 2 11 Setting prohibited (no signal, unconnected) Data Sheet S13417EJ2V0DS00 PC1851B L-channel, R-channel L-channel, R-channel L-channel, R-channel Output R-channel output (ROT, FOR pins) Mute TV signal (R) External input 1 (R) ...
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... If the load capacitance of the output pins (SOT, ROT, LOT, MOR, MOL, FOR, FOL pins) exceeds 100 pF, parasitic oscillation may occur. In this case, connect a resistor between the output pins and the load capacitance. Bear in mind that the load capacitance is changed by wiring pattern on the printed circuit board ...
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... Reducing the capacitor value increases the capture range, and increasing it reduces the capture range. However, too small a capacitor value may cause the distortion rate to become worse during stereo output, or may cause malfunction. In this case, please contact NEC. Table 7-3. External Components Pin description ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (unless otherwise specified, T Parameter Power supply voltage bus input pin voltage Composite signal input voltage Package power dissipation Operating ambient temperature Storage temperature Caution Exposure to Absolute Maximum Rating ...
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Electrical Characteristics (unless otherwise specified, T Parameter Input: COM pin, Output: FOL, FOR pins Supply current Stereo detection input sensitivity Stereo detection hysteresis Stereo detection capture range SAP detection input sensitivity SAP detection hysteresis Noise detection input sensitivity Noise ...
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Parameter Stereo channel separation 2 Stereo channel separation 3 Stereo channel separation 4 Stereo channel separation 5 Monaural total harmonic distortion Stereo total harmonic distortion 1 Stereo total harmonic distortion 2 SAP total harmonic distortion Crosstalk 1 (SAP Stereo) ...
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Parameter Low frequency band width boost control Low frequency band width cut control High frequency band width boost control High frequency band width cut control Volume attenuation 1 Volume attenuation 2 Volume attenuation 3 Balance attenuation L-ch 1 Balance ...
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Test Condition Parameters for Electrical Characteristics (Unless otherwise specified, T Parameter Symbol Supply current I CC Stereo detection input ST SENCE sensitivity Stereo detection hysteresis ST HY Stereo detection ST CCL capture range ST CCH SAP detection input SAP ...
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Parameter SAP total output voltage Difference between monaural L and R output voltage Monaural total frequency characteristics 1 Monaural total frequency characteristics 2 Monaural total frequency characteristics 3 Monaural total frequency characteristics 4 Stereo total frequency characteristics 1 Stereo ...
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Parameter Symbol SAP total frequency V OSAP11 characteristics 1 SAP total frequency V OSAP12 characteristics 2 SAP total frequency V OSAP13 characteristics 3 Stereo channel Sep separation 1 Stereo channel Sep separation 2 Stereo channel Sep separation 3 Note ...
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Parameter Stereo channel separation 4 Stereo channel separation 5 Monaural total harmonic distortion Stereo total harmonic distortion 1 Stereo total harmonic distortion 2 SAP total harmonic distortion Crosstalk 1 (SAP Stereo) Crosstalk 2 (Stereo SAP) Note For details about ...
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Parameter Symbol Monaural total S/N S/N MO Stereo total S/N S/N ST SAP total S/N S/N SAP Total muting level Mute Timing current I T Inter-mode DC offset 1 V DOF1 Note For details about the User Mode, refer ...
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Parameter Inter-mode DC offset 2 Inter-mode DC offset 3 Inter-mode DC offset 4 Surround output characteristics 1 Surround output characteristics 2 Surround output characteristics 3 Surround output characteristics 4 Note For details about the User Mode, refer to 5. ...
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Parameter Symbol Low frequency band V BB width boost control Low frequency band V BC width cut control High frequency band V TB width boost control High frequency band V TC width cut control Volume attenuation 1 ATT VL1 ...
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Parameter Crosstalk 3 TV signal External input Crosstalk 4 L-ch R-ch Total harmonic distortion (in case of external input) Maximum input voltage of external input Output noise (in case of external input) Note For details about the User Mode, ...
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... ER2 MOL MOR LOT ROT AGND V CC DGND PC1851B peripheral block FHM SDA SCL COM L Interface block Overall surface analog GND COM AGND JP DGND V DD 0.1 F PC78M05AHF 0 DGND DD (+5 V) SCL SDA TM EEPROM block DV DGND PC DD (+5 V) SDA(P) connector SDA SCL(P) SCL IN(P) ...
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PC1851B Peripheral Block FHM V CC 4.7 F COM 0.47 F AGND Note Filter: 126XGS-7990Z, TOKO Remark Use the followings for external parts. Resistor (*): Metal film resistor ( 1 %). Unless otherwise specified Capacitors (**): Tantalum ...
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PACKAGE DRAWINGS 42-PIN PLASTIC SDIP (15.24mm(600 NOTES 1. Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. 2. Item "K" ...
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... If other soldering processes are used the soldering is performed under different conditions, please make sure to consult with our sales offices. For more details, refer to our document ”Semiconductor Device Mounting Technology Manual” (C10535E). PC1851BCU: 42-pin plastic SDIP (15.24 mm (600)) Wave soldering (only to leads) Partial heating method ...
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... NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others ...