LP3882ES-1.2 National Semiconductor, LP3882ES-1.2 Datasheet
LP3882ES-1.2
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LP3882ES-1.2 Summary of contents
Page 1
... Typical Application Circuit At least 4.7 µF of input and output capacitance is required for stability. Connection Diagrams TO-220, Top View © 2003 National Semiconductor Corporation Features n Ultra low dropout voltage (110 mV n Low ground pin current n Load regulation of 0.04%/ typical quiescent current in shutdown n 1.5% output accuracy (25˚ ...
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... Ordering Information Order Number LP3882ES-1.2 LP3882ESX-1.2 LP3882ET-1.2 LP3882ES-1.5 LP3882ESX-1.5 LP3882ET-1.5 LP3882ES-1.8 LP3882ESX-1.8 LP3882ET-1.8 Block Diagram www.national.com Package Type Package Drawing TO263-5 TS5B TO263-5 TS5B TO220-5 T05D TO263-5 TS5B TO263-5 TS5B TO220-5 T05D TO263-5 TS5B TO263-5 TS5B TO220-5 T05D 2 Supplied As Rail Tape and Reel ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Range Lead Temp. (Soldering, 5 seconds) ESD Rating Human Body Model (Note 3) Machine Model (Note 10) Power Dissipation (Note 2) V Supply Voltage (Survival) ...
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Electrical Characteristics over the full operating temperature range. Unless otherwise specified 4.7 µ (Continued) OUT S/D BIAS Symbol Parameter AC Parameters PSRR (V ) Ripple Rejection for Voltage PSRR Ripple ...
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Typical Performance Characteristics 4.7µF, S/D pin is tied 2.2V, V BIAS IN Dropout Temperature OUT Line Regulation vs V Unless otherwise specified 1.8V. OUT 20063204 20063206 IN 20063208 ...
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Typical Performance Characteristics 4.7µF, S/D pin is tied 2.2V, V BIAS BIAS L Noise Measurement V Startup Waveform OUT www.national.com Unless otherwise specified 1.8V. (Continued) OUT 20063210 V 20063214 ...
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Typical Performance Characteristics 4.7µF, S/D pin is tied 2.2V, V BIAS IN Line Regulation PSRR IN Unless otherwise specified 1.8V. (Continued) OUT BIAS 20063219 20063223 7 = 25˚ ...
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... PNP or P-FET LDO regulator can cause a loss of phase margin which can result in oscillations, even from BIAS when a Tantalum output capacitor is in parallel with it. This is not unique to National Semiconductor LDO regulators true of any P-type LDO regulator. is BIAS The reason for this is that PNP or P-FET regulators have a ...
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Application Hints (Continued) UNDER VOLTAGE LOCKOUT The bias voltage is monitored by a circuit which prevents the regulator output from turning on if the bias voltage is below approximately 4V. SHUTDOWN OPERATION Pulling down the shutdown (S/D) pin will turn-off ...
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Application Hints (Continued) As shown in the graph below, increasing the copper area beyond 1 square inch produces very little improvement. The minimum value for θ for the TO-263 package mounted PCB is 32˚C/W. Figure 2 shows ...
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Physical Dimensions inches (millimeters) unless otherwise noted TO220 5-lead, Molded, Stagger Bend Package (TO220-5) NS Package Number T05D 11 www.national.com ...
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... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...