74LVC273PW,118 NXP Semiconductors, 74LVC273PW,118 Datasheet - Page 4

IC OCT D-TYPE FLIP-FLOP 20TSSOP

74LVC273PW,118

Manufacturer Part Number
74LVC273PW,118
Description
IC OCT D-TYPE FLIP-FLOP 20TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
D-Type Busr
Datasheet

Specifications of 74LVC273PW,118

Package / Case
20-TSSOP
Function
Master Reset
Output Type
Non-Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
150MHz
Delay Time - Propagation
1.5ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
LVC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
6 ns at 3.3 V
High Level Output Current
- 24 mA
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
1.2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2268-2
74LVC273PW-T
935210650118

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC273PW,118
Manufacturer:
NXP Semiconductors
Quantity:
1 950
Part Number:
74LVC273PW,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Philips Semiconductors
2004 Mar 12
handbook, halfpage
handbook, halfpage
Octal D-type flip-flop with reset;
positive-edge trigger
Fig.1 Pin configuration SO20 and (T)SSOP20.
GND
MR
Q0
Q1
Q2
Q3
D0
D1
D2
D3
Fig.3 Logic symbol.
13
14
17
18
10
3
4
7
8
4
6
7
8
9
1
2
3
5
D0
D1
D2
D3
D4
D5
D6
D7
273
MR
CP
11
1
MNA762
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
MNA763
19
18
17
16
15
14
13
12
11
20
12
15
16
19
2
5
6
9
V CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
4
handbook, halfpage
handbook, halfpage
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN20.
Q0
Q1
Q2
Q3
D0
D1
D2
D3
Fig.4 Logic symbol (IEEE/IEC).
MR
CP
D0
D1
D2
D3
D4
D5
D6
D7
Top view
2
3
4
5
6
7
8
9
11
13
14
17
18
1
3
4
7
8
1D
R
GND
C1
MR
10
GND
1
V CC
MNA764
(1)
CP
20
11
Product specification
MNA975
12
15
16
19
2
5
6
9
74LVC273
19
18
17
16
15
14
13
12
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q7
D7
D6
Q6
Q5
D5
D4
Q4

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