AD5300BRT Analog Devices, AD5300BRT Datasheet
AD5300BRT
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AD5300BRT Summary of contents
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... MICROWIRE is a trademark of National Semiconductor Corporation. *Patent pending; protected by U.S. Patent No. 5684481. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices ...
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AD5300–SPECIFICATIONS Parameter 2 STATIC PERFORMANCE Resolution Relative Accuracy Differential Nonlinearity Zero Code Error Full-Scale Error Gain Error Zero Code Error Drift Gain Temperature Coefficient 3 OUTPUT CHARACTERISTICS Output Voltage Range Output Voltage Settling Time Slew Rate Capacitive Load Stability Digital-to-Analog ...
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... This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating condi- + 0.3 V tions for extended periods may affect device reliability 0 Model AD5300BRT Max–T )/ AD5300BRM *RT = SOT-23 SOIC. Max–T ...
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AD5300 V OUT GND V SOT-23 Pin Numbers Pin No. Mnemonic Function 1 V Analog output voltage from DAC. The output amplifier has rail-to-rail operation. OUT 2 GND Ground reference point for all circuitry on the part Power ...
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TERMINOLOGY Relative Accuracy For the DAC, relative accuracy or Integral Nonlinearity (INL measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer func- tion. A typical INL vs. code ...
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AD5300–Typical Performance Characteristics + 0.5 INL @ 3V INL @ 5V 0 –0.5 –1 50 100 150 200 250 0 CODE Figure 2. Typical INL Plot +5V DD 0.5 MAX INL MAX ...
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V = +5V DD 250 200 150 100 50 0 – TEMPERATURE – C Figure 11. Supply Current vs. Temperature 800 600 400 200 +3V ...
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AD5300 GENERAL DESCRIPTION D/A Section The AD5300 DAC is fabricated on a CMOS process. The archi- tecture consists of a string DAC followed by an output buffer amplifier. Since there is no reference input pin, the power supply (V ) ...
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SCLK SYNC DB15 DIN INVALID WRITE SEQUENCE: SYNC HIGH BEFORE 16 TH FALLING EDGE SYNC Interrupt In a normal write sequence, the SYNC line is kept low for at least 16 falling edges of SCLK and the DAC is updated ...
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AD5300 AD5300 to 68HC11/68L11 Interface Figure 26 shows a serial interface between the AD5300 and the 68HC11/68L11 microcontroller. SCK of the 68HC11/68L11 drives the SCLK of the AD5300, while the MOSI output drives the serial data line of the DAC. ...
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R1 = 10k V V OUT 0.1 F AD5300 THREE-WIRE SERIAL INTERFACE Figure 30. Bipolar Operation with the AD5300 Two 8-Bit AD5300s Together Make One 15-Bit DAC By using the configuration below in Figure 31, it ...
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AD5300 0.071 (1.80) 0.059 (1.50) 0.051 (1.30) 0.035 (0.90) 0.006 (0.15) 0.002 (0.05) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 6-Lead SOT-23 (RT-6) 0.122 (3.10) 0.106 (2.70 0.118 (3.00) 0.098 (2.50 PIN 1 ...