LTC2309 Linear Technology Corporation, LTC2309 Datasheet - Page 17

• Manufacturer Part Number: LTC2309
• Description: 12-Bit SAR ADC
• Manufacturer: Linear Technology Corporation

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Nap Mode
The ADC enters nap mode after a conversion is com-
plete (t
ply current decreases to 210μA in nap mode between
conversions, thereby reducing the average power
dissipation as the sample rate decreases. For example,
the LTC2309 draws an average of 300μA at a 1ksps
sampling rate. The LTC2309 keeps only the reference
(V
when in nap mode.
Sleep Mode
The ADC enters sleep mode after a conversion is com-
plete (t
draws only 7μA in sleep mode, provided that none of
the digital inputs are switching. When the LTC2309 is
properly addressed, the ADC is released from sleep mode
and requires 200ms (t
the respective 2.2μF and 10μF bypass capacitors on the
APPLICATIONS INFORMATION
REF
) and reference buffer (REFCOMP) circuitry active
CONV
CONV
) if the SLP bit is set to a logic 0. The sup-
) if the SLP bit is set to a logic 1. The ADC
CONVERSION
SDA
SCL
REFWAKE
Figure 13b. Timing Diagram Showing Acquisition During a Write Operation
Figure 13a. Timing Diagram Showing Acquisition During a Read Operation
SDA
SCL
S
A2
5
) to wake up and charge
Figure 12. Exiting Sleep Mode and Starting a New Conversion
A1
7-BIT ADDRESS
6
A0
7
A6
1
SLEEP
R/W
8
A5
2
9
A4
3
A3
4
R/W ACK
S/D
1
A2
5
O/S
2
A1
6
t
V
be initiated before this time as shown in Figure 12.
Acquisition
The LTC2309 begins acquiring the input signal at dif-
ferent instances depending on whether a read or write
operation is being performed. If a read operation is
being performed, acquisition of the input signal begins
on the rising edge of the 9th clock pulse following the
address frame as shown in Figure 13a.
If a write operation is being performed, acquisition of
the input signal begins on the falling edge of the sixth
clock cycle after the D
shown in Figure 13b. The LTC2309 will acquire the
signal from the input channel that was most recently
programmed by the D
required to acquire the input signal before initiating a
new conversion.
REFWAKE
S1
3
REF
A0
7
S0
4
and REFCOMP pins. A new conversion should not
R/W
8
UNI
5
9
SLP
6
ACQUISITION BEGINS
t
ACQ
X
7
ACQUISITION BEGINS
B11
P
t
CONVERSION
ACQ
1
X
2309 F13a
8
B10
IN
2
IN
9
word. A minimum of 240ns is
word has been shifted in as
2309 F13b
2309 F12
LTC2309
17
2309f