cy2sstv850oct SpectraLinear Inc, cy2sstv850oct Datasheet - Page 4
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cy2sstv850oct
Manufacturer Part Number
cy2sstv850oct
Description
Differential Clock Buffer/driver
Manufacturer
SpectraLinear Inc
Datasheet
1.CY2SSTV850OCT.pdf
(9 pages)
Rev 1.0, November 21, 2006
Table 1. Timing Requirements for the 2-line Serial Interface over Recommended Ranges of Operating Free-air
Temperature and VDDI from 3.3V to 3.5V
f
t
t
t
t
t
t
t
t
t
t
SCLK
BUS
SU(STARt)
H(START)
W(SCLL)
W(SCLH)
R(SDATA)
F(SDATA)
SU(SDATA)
H(SDATA)
SU(STOP)
Parameter
Start Bit
1 bit
1 bit
Ack
Slave Address
7 bits
Data Byte 0
8 bits
SCLK frequency
Bus free time
START set-up time
START hold time
SCLK low pulse duration
SCLK high pulse duration
SDATA input rise time
SDATA input fall time
SDATA set-up time
SDATA hold time
STOP set-up time
1 bit
R/W
1 bit
Ack
Ack
1 bit
Data Byte 1
Description
8 bits
Command Code
8 bits
Ack
1 bit
1 bit
.....
Ack
Byte Byte N
Byte Count N
8 bits
8 bits
Min.
250
4.7
4.0
4.7
4.0
4.7
0
4
1 bit
Ack
CY2SSTV850
Stop
1 bit
Max.
1000
100
300
Page 4 of 9
Unit
kHz
μs
μs
μs
μs
μs
ns
ns
ns
μs
ns