ds1543 Maxim Integrated Products, Inc., ds1543 Datasheet
ds1543
Related parts for ds1543
ds1543 Summary of contents
Page 1
... Encapsulated Package (700 Mil Extended) PIN DESCRIPTION A0-A12 - Address Input DQ0-DQ7 - Data Input/Outputs \FT - Interrupt, Frequency Test IRQ Output (Open-Drain) - Power-On Reset Output RST (Open-Drain) - Chip Enable CE - Output Enable OE - Write Enable Power Supply Input CC GND - Ground Connection PRELIMINARY DS1543 081000 ...
Page 2
... RAM. User access to all registers within the DS1543 is accomplished with a bytewide interface as shown in Figure 1. The RTC registers contain year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for day of month and leap year are made automatically ...
Page 3
... If the address inputs are changed while AA will remain valid for output data hold time (t access. DATA WRITE MODE The DS1543 is in the write mode whenever referenced to the latter occurring transition of the cycle. and must return inactive for a minimum read or write cycle ...
Page 4
... All control, data, and address signals must be powered down when V BATTERY LONGEVITY The DS1543 has a lithium power source that is designed to provide energy for the clock activity, and clock and RAM data retention when the V supply is sufficient to power the DS1543 continuously for the life of the equipment in which it is installed ...
Page 5
... The MSB of the seconds register (B7 of 1FF9h). Setting stops the oscillator, setting starts the oscillator. The DS1543 is shipped from Dallas Semiconductor with the clock oscillator turned off, bit set ...
Page 6
... The alarm can be programmed to activate on a specific day of the month or repeat every day, hour, minute, or second. It can also be programmed to go off while the DS1543 is in the battery-backed state of operation to serve as a system wake-up. Alarm mask bits AM1-AM4 control the alarm mode. Table 3 shows the possible settings ...
Page 7
... Figure 4 illustrates alarm timing during the battery backup mode and power-up states. IRQ is fulfilled. The alarm flag is also cleared by a read RC /FT will go low if an alarm IRQ DS1543 /FT pin. The /FT IRQ ...
Page 8
... POWER-ON DEFAULT STATES Upon application of power to the device, the following register bits are set to 0: WDS=0, BMB0-BMB4=0, RB0-RB1=0, AE=0, ABE=0. /FT output when the watchdog times out. IRQ output for a duration of RST /FT output and the frequency test IRQ DS1543 ...
Page 9
... OL2 V 4. 3.3V 10 10% 3.3V 10 10% TYP MAX UNITS V +0. +0. 0.8 0 5.0V ± 10%) CC TYP MAX UNITS 0.4 V 0.4 V 4.37 4. BAT DS1543 NOTES NOTES ...
Page 10
... READ CYCLE TIMING DIAGRAM Figure 5 SYMBOL MIN TYP CC1 IH I CC2 2 OL1 V OL2 V 2. 3.3V ± 10%) CC MAX UNITS 0 0 0.4 V 0.4 V 2.88 2. BAT PF DS1543 NOTES ...
Page 11
... OEA t 35 OEZ 5.0V 10%) CC MIN MAX UNITS NOTES 100 ns 100 100 3.3V 10%) CC MIN MAX UNITS NOTES 150 ns 150 150 130 DS1543 ...
Page 12
... WEZ 5.0V 10%) CC MIN MAX UNITS NOTES 100 3.3V 10%) CC MIN MAX UNITS NOTES 150 130 ns 140 DS1543 ...
Page 13
... WRITE CYCLE TIMING, WRITE ENABLE CONTROLLED Figure 6 WRITE CYCLE TIMING, CHIP ENABLE CONTROLLED Figure DS1543 ...
Page 14
... CC PF(MIN) V PF(MAX High RST PF Expected Data Retention Time (Oscillator On) POWER-UP/DOWN WAVEFORM TIMING 5-VOLT DEVICE Figure 8 SYMBOL MIN TYP 300 REC DS1543 (V = 5.0V 10%) CC MAX UNITS NOTES 200 ms years 6, 7 ...
Page 15
... Capacitance on all input pins Capacitance on /FT, IRQ RST and DQ pins SYMBOL MIN 300 REC SYMBOL MIN 3.3V 10%) CC TYP MAX UNITS 200 ms years (T TYP MAX UNITS DS1543 NOTES NOTES 1 1 ...
Page 16
... IRQ RST 6. Data retention time Each DS1543 has a built-in switch that disconnects the lithium source until V user. The expected t is defined for DIP modules as a cumulative time in the absence from the time power is first applied by the user. ...
Page 17
... DS1543 28-PIN PACKAGE DS1543 ...