si531 Silicon Laboratories, si531 Datasheet
si531
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si531 Summary of contents
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... Ordering Information: See page 7. Pin Assignments: See page 6. (Top View CLK– GND 3 4 CLK+ Si530 (LVDS/LVPECL/CML GND 3 4 CLK Si530 (CMOS CLK– GND 3 4 CLK+ Si531 (LVDS/LVPECL/CML) Si530/531 ...
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Si530/531 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter 1 Supply Voltage Supply Current 2 Output Enable (OE) Operating Temperature Range Notes: 1. Selectable parameter specified by part number. See Section 3. "Ordering Information" on page 7 for further ...
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Table 2. CLK± Output Frequency Characteristics (Continued) Parameter Total Stability 4 Powerup Time Notes: 1. See Section 3. "Ordering Information" on page 7 for further details. 2. Specified at time of order by part number. Also available in frequencies from ...
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Si530/531 Table 4. CLK± Output Phase Jitter Parameter Symbol Phase Jitter (RMS)* for F > 500 MHz OUT Phase Jitter (RMS)* for F of 125 to 500 MHz OUT *Note: Differential Modes: LVPECL/LVDS/CML. Refer to AN256 for further information. Table ...
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Table 7. Absolute Maximum Ratings Parameter Maximum Operating Temperature Supply Voltage Input Voltage (any input pin) Storage Temperature ESD Sensitivity (HBM, per JESD22-A114) Soldering Temperature (Pb-free profile) Soldering Temperature Time @ T PEAK Notes: 1. Stresses beyond those listed in ...
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... Table 9. Pinout for Si530 Series No connection 0 = clock output disabled (outputs tristated) Output enable Oscillator Output Complementary Output Power Supply Voltage . DD Table 10. Pinout for Si531 Series LVDS/LVPECL/CML Function Output enable 0 = clock output disabled (outputs tristated clock output enabled No connection GND Electrical and Case Ground Oscillator Output ...
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... The Si530 and Si531 XO series are supplied in an industry-standard, RoHS compliant, 6-pad package. The Si531 Series supports an alternate OE pinout (pin #1) for the LVPECL, LVDS, and CML output formats. See Tables 9 and 10 for the pinout differences between the Si530 and Si531 series ...
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Si530/531 4. Outline Diagram and Suggested Pad Layout Figure 2 illustrates the package details for the Si530/531. Table 11 lists the values for the dimensions shown in the illustration. Table 11. Package Diagram Dimensions (mm) Dimension ...
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... Si530/Si531 Mark Specification Figure 3 illustrates the mark specification for the Si530/Si531. Table 12 lists the line information. Table 12. Si53x Top Mark Description Line Position 1 1–10 “SiLabs”+ Part Family Number, 5xx (First 3 characters in part number) 2 1–10 Si530, Si531: Option1 + Option2 + Freq(7) + Temp ...
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Si530/531 6. 6-Pin PCB Land Pattern Figure 4 illustrates the 6-pin PCB land pattern for the Si530/531. Table 13 lists the values for the dimensions shown in the illustration. Figure 4. Si530/531 PCB Land Pattern Table 13. PCB Land Pattern ...
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... Revised period jitter specifications. Updated Table 7, “Absolute Maximum Ratings page 5 to reflect the soldering temperature time at 260 ºC is 20–40 sec per JEDEC J-STD-020C. Updated 3. "Ordering Information" on page 7. Changed ordering instructions to revision D. Added 5. "Si530/Si531 Mark Specification" on page 9. 1 ,” on Rev. 1.1 Si530/531 ...
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... Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per- sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages ...