si3200-x-gs Silicon Laboratories, si3200-x-gs Datasheet - Page 87
si3200-x-gs
Manufacturer Part Number
si3200-x-gs
Description
Dual Programmable Cmos Slic With Line Monitoring
Manufacturer
Silicon Laboratories
Datasheet
1.SI3200-X-GS.pdf
(128 pages)
- Current page: 87 of 128
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SBIAS: SLIC Bias Control (Register Address 8)
(Register type: Initialization/protected register bits)
Reset settings = 0xE0
Note: Bit type “P” = user-protected bits. Refer to the protected register bit section in the text of this application note.
Name
Type
Bit
3:2
1:0
Bit
7
6
5
4
OBIAS[1:0]
ABIAS[1:0]
STDBY
R/W–P
BIASEN
STDBY
SQLCH
Name
CAPB
D7
SQLCH
R/W–P
D6
Low-power Standby Status.
Writing to this bit causes temporary manual control of this bit until a subsequent on-hook
or off-hook transition.
0 = low-power mode off (i.e. Active off-hook).
1 = low-power mode on (i.e. Active on-hook).
Audio Squelch Control.
Indicates squelch of audio during the setting time set by the SPEEDUP RAM coefficient.
Writing to this bit causes temporary manual override until a speedup event occurs.
0 = Squelch off.
1 = Squelch on.
Audio Filter Capacitor Bypass.
Indicates filter capacitor pass during the setting time set by the SPEEDUP RAM coeffi-
cient. Writing to this bit causes temporary manual override until a speedup event occurs.
0 = Capacitors not bypassed.
1 = Capacitors bypassed.
SLIC Bias Enable.
Writing to this bit causes temporary manual control of SLIC bias until a subsequent on-
hook or off-hook state.
0 = SLIC bias off (i.e. Active on-hook).
1 = = SLIC bias on (i.e. Active off-hook).
SLIC Bias Level, On-Hook Transmission State.
DC bias current flowing in the SLIC circuit during on-hook transmission state. Increasing
this value increases the ability of the SLIC to withstand longitudinal current artifacts.
00 = 4 mA per lead.
01 = 8 mA per lead.
10 = 12 mA per lead.
11 = 16 mA per lead.
SLIC Bias Level, Active State.
DC bias current flowing in the SLIC circuit during the active off-hook state. Increasing this
value increases the ability of the SLIC to withstand longitudinal current artifacts.
00 = 4 mA per lead.
01 = 8 mA per lead.
10 = 12 mA per lead.
11 = 16 mA per lead.
R/W–P
CAPB
D5
BIASEN
R/W–P
Preliminary Rev. 0.96
D4
D3
OBIAS[1:0]
R/W–P
Function
D2
D1
ABIAS[1:0]
R/W–P
D0
Si3232
87
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