74HCT174D,652 NXP Semiconductors, 74HCT174D,652 Datasheet - Page 7
![IC HEX D F-F POS-EDGE 16-SOIC](/photos/6/52/65286/16-soic_sot109-1_sml.jpg)
74HCT174D,652
Manufacturer Part Number
74HCT174D,652
Description
IC HEX D F-F POS-EDGE 16-SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
D-Type Busr
Datasheets
1.74HCT4046ADB112.pdf
(19 pages)
2.74HCT4046ADB112.pdf
(23 pages)
3.74HCT174N652.pdf
(13 pages)
Specifications of 74HCT174D,652
Output Type
Inverted
Package / Case
16-SOIC (3.9mm Width)
Function
Master Reset
Number Of Elements
1
Number Of Bits Per Element
6
Frequency - Clock
63MHz
Delay Time - Propagation
21ns
Trigger Type
Positive Edge
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
HCT
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
18 ns
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2796-5
933715050652
933715050652
Philips Semiconductors
AC WAVEFORMS
1998 Jul 08
Hex D-type flip-flop with reset; positive-edge trigger
(1)
Fig.6
(1)
The shaded areas indicate when the input is permitted to
change for predictable output performance
HCT : V
HCT : V
HC : V
HC : V
Waveforms showing the clock (CP) to output
(Q
width, the output transition times and the
maximum clock pulses frequency.
M
M
n
M
M
= 1.3 V; V
= 1.3 V; V
) propagation delays, the clock pulse
= 50%; V
= 50%; V
Fig.8 Waveforms showing the data set-up and hold times for the data input (D
I
I
I
I
= GND to V
= GND to V
= GND to 3 V.
= GND to 3 V.
CC
CC
.
.
7
(1)
Fig.7
HCT : V
HC : V
Waveforms showing the master reset (MR)
pulse width, the master reset to output (Q
propagation delays and the master reset to
clock (CP) removal time.
M
M
= 1.3 V; V
= 50%; V
I
I
= GND to V
= GND to 3 V.
CC
74HC/HCT174
.
n
Product specification
).
n
)