si4330 Silicon Laboratories, si4330 Datasheet - Page 75
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si4330
Manufacturer Part Number
si4330
Description
Si4330 Ism Receiver
Manufacturer
Silicon Laboratories
Datasheet
1.SI4330.pdf
(142 pages)
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Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Table 31. Detailed Description of Status Registers when not Enabled as Interrupts
ipreainval Self cleaning, user should use this as an interrupt source rather than a status.
ipreaval
ichiprdy
ipreainval Self cleaning, user should use this as an interrupt source rather than a status.
Status
Name
iswdet
ipreaval
ichiprdy
Status
iswdet
Name
irssi
iwut
ipor
ilbd
irssi
iwut
ipor
ilbd
Goes high once the Sync Word is detected. Goes low once we are done receiving the cur-
Goes high once the preamble is detected. Goes low once the sync is detected or the RX
Should remain high as long as the RSSI value is above programmed threshold level
Low Battery Detect. When a low battery event is been detected this bit will be set to 1. This
rent packet.
wait for the sync times-out.
Wake time timer interrupt. Use as an interrupt, not as a status.
interrupt event is saved even if it is not enabled by the mask register bit and causes an inter-
rupt after it is enabled. Probably the status is cleared once the battery is replaced.
Chip ready goes high once we enable the xtal, RX and a settling time for the Xtal clock
elapses. The status stay high unless we go back to Idle mode.
Power on status.
Goes high once the Sync Word is detected. Goes low once we are done receiving the cur-
rent packet.
Goes high once the preamble is detected. Goes low once the sync is detected or the RX
wait for the sync times-out.
Should remain high as long as the RSSI value is above programmed threshold level
Wake time timer interrupt. Use as an interrupt, not as a status.
Low Battery Detect. When a low battery event is been detected this bit will be set to 1. This
interrupt event is saved even if it is not enabled by the mask register bit and causes an
interrupt after it is enabled. Probably the status is cleared once the battery is replaced.
Chip ready goes high once we enable the xtal, RX, and a settling time for the Xtal clock
elapses. The status stay high unless we go back to Idle mode.
Power on status.
Table 30. Interrupt or Status 2 Bit Set/Clear Description
Preliminary Rev 0.2
Set/Clear Conditions
Set/Clear Conditions
Si4330
75