ir1150s International Rectifier Corp., ir1150s Datasheet - Page 9

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ir1150s

Manufacturer Part Number
ir1150s
Description
Upfc One Cycle Control Pfc Ic
Manufacturer
International Rectifier Corp.
Datasheet

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Operating States
UVLO Mode
The IC remains in the UVLO condition until the voltage
on the V
voltage, V
During the time the IC remains in the UVLO state,
the gate drive circuit is inactive and the IC draws a
quiescent current of I
accessible from any other state of operation whenever
the IC supply voltage condition of V
occurs.
Standby Mode
The IC is in this state if the supply voltage has
exceeded V
than 20% of V
internal circuitry is biased in this state but the gate is
inactive. This state is accessible from any other state
of operation except OVP. The IC enters this state
whenever the V
of V
peak current limit fault condition, or 20% V
operating in soft start mode.
Soft Start Mode
This state is activated once the V
exceeded V
exceeded 20% of V
The soft start time, which is defined as the time
required for the duty cycle to linearly increase from
zero to maximum, is dependent upon the values
selected for compensation of the voltage loop pin
COMP to pin COM. Throughout the soft start cycle,
the output of the voltage error amplifier (pin COMP)
charges through the compensation network. This
forces a linear rise of the voltage at this node which
in turn forces a linear increase in the gate drive duty
cycle from 0. This controlled duty cycle reduces
system component stress during start up conditions
as the input current amplitude is increasing linearly.
www.irf.com
REF
when operating in normal mode or during a
CC
CC ON.
pin exceeds the V
CC ON
CCON
REF
FB
pin voltage has decreased to 50%
. The oscillator is running and all
and the V
REF
and the V
CC START.
.
FB
CC
FB
The UVLO mode is
pin voltage is less
turn on threshold
pin voltage has
CC
CC
voltage has
< V
REF
CC UVLO
when
Normal Mode
The IC enters normal operating mode once the soft
start transition has been completed. At this point the
gate drive is switching and the IC draws a maximum
of I
will initiate another soft start sequence in the event
of a shutdown due to a fault, which activates the
protection circuitry, or if the supply voltage drops below
the UVLO turn off threshold of V
Fault Protection Mode
The fault mode will be activated when any of the
protection circuits are activated. The IC protection
circuits include Supply Voltage Under Voltage Lockout
(UVLO), Output Over Voltage Protection (OVP), Open
Loop Protection (OLP), Output Undervoltage
Protection (OUV), and Peak Current Limit Protection
(I
Sleep Mode
The sleep mode is initiated by pulling the OVP pin
below 0.62V (typ). In this mode the IC draws a very
low quiescent supply current.
PK LIMIT
CC
IR1150S/IR1150IS(PbF)
from the supply voltage source. The device
).
CC UVLO.
9

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