isl29003 Intersil Corporation, isl29003 Datasheet - Page 9

• Manufacturer Part Number: isl29003
• Description: Light-to-digital Output Sensor With High Sensitivity, Gain Selection, Interrupt Function And I2c Interface
• Manufacturer: Intersil Corporation

INTEGRATION TIME IN EXTERNAL TIMING MODE
This timing mode is programmed in the command register
00(hex) bit 5. External Timing Mode is recommended when
integration time can be synchronized to an external signal
such as a PWM to eliminate noise.
For Mode1 or Mode2 operation, the integration starts when
the sync_iic command is sent over the I
needs two sync_iic commands to complete a photodiode
conversion. The integration then stops when another
sync_iic command is received. Writing a logic 1 to the
sync_iic bit ends the current adc integration and starts
another one.
For Mode3, the operation is a sequential Mode1 and Mode2.
The device needs three sync_iic commands to complete two
photodiode measurements. The 1st sync_iic command starts
the conversion of the diode1. The 2nd sync_iic completes the
conversion of diode1 and starts the conversion of diode2. The
3rd sync_iic pulse ends the conversion of diode2 and starts
over again to commence conversion of diode1.
The integration time, t
i
f
The internal oscillator, f
internal and external timing modes, with the same
dependence on R
the number of clock cycles per integration is no longer fixed
at 2
integration time, and is limited to 2
avoid erroneous lux readings the integration time must be
short enough not to allow an overflow in the counter register.
t
t
*Integration time in milliseconds
**Recommended R
I2C
I2C
TABLE 13. INTEGRATION TIMES FOR TYPICAL R
int
int
R
100**
(kΩ)
<
200
500
n
=
is the number of I
EXT
50
is the I
. The number of clock cycles varies with the chosen
65,535
----------------- -
f
i
----------
f
OSC
I2C
I2C
2
C operating frequency.
n = 16-BIT
1000
100
200
400
EXT
EXT
RANGE1
RANGE2
. However, in External Timing Mode,
2
resistor value
int
C clock cycles to obtain the t
OSC
, is determined by Equation 12:
n = 12-BIT
, operates identically in both the
6.4
13
26
64
9
16
= 65,536. In order to
n = 12-BIT
2
C lines. The device
3.2
6.5
13
32
RANGE3
RANGE4
EXT
int.
VALUES
0.013
0.025
0.050
0.125
n = 4
(EQ. 12)
(EQ. 13)
ISL29003
Noise Rejection
In general, integrating type ADC’s have an excellent noise-
rejection characteristics for periodic noise sources whose
frequency is an integer multiple of the integration time. For
instance, a 60Hz AC unwanted signal’s sum from 0ms to
k*16.66ms (k = 1,2...k
integration time to be an integer multiple of the periodic
noise signal, greatly improves the light sensor output signal
in the presence of noise.
DESIGN EXAMPLE 1
The ISl29003 will be designed in a portable system. The
ambient light conditions that the device will be exposed to is
at most 500 lux which is a good office lighting. The light
source has a 50/60Hz power line noise which is not visible
by the human eye. The I
Solution - Using Internal Timing Mode
In order to achieve both 60Hz and 50Hz AC noise rejection,
the integration time needs to be adjusted to coincide with an
integer multiple of the AC noise cycle times.
The first instance of integer values at which t
60Hz and 50Hz is when i = 6, and j = 5.
Next, the Gain/Range needs to be determined. Based on the
application condition given, lux(max) = 500 lux, a range of
1000 lux is desirable. This corresponds to a Gain/Range
Range1 mode. Also impose a resolution of n = 16-bit. Hence
we choose Equation 10 to determine R
The Full Scale Range, FSR, needs to be determined. From
Equation 3:
FSR
FSR
The effective transfer function becomes:
E
R
R
f
Range1 or Range2.
f
Range3 or Range4.
t
t
t
EXT
EXT
=
OSC
OSC
int
int
int
for Internal Timing Mode and Gain/Range is set to Range3 or Range4 only
data
------------ -
2
=
=
= i(1/60Hz) = j(1/50Hz).
= 6(1/60Hz) = 5(1/50Hz)
= 100ms
16
=
=
1000 lux
2000 lux
= 327kHz*100kΩ/R
= 655kHz*100kΩ/R
t
------------------------------------------------------------ -
50kΩ
×
int
2000 lux
×
327kHz
100kΩ
----------------- -
50kΩ
2
n
i
×
) is zero. Similarly, setting the device’s
100
2
C clock is 10kHz.
kΩ
EXT
EXT
. When Range/Gain is set to
. When Range/Gain is set to
EXT
.
int
rejects both
October 8, 2007
FN7464.3