cs4239 Cirrus Logic, Inc., cs4239 Datasheet - Page 40

• Manufacturer Part Number: cs4239
• Description: Crystalclear? Ortable Isa Audio System Logic
• Manufacturer: Cirrus Logic, Inc.

Playback Upper Base (I14)
Default = 00000000
PUB7-PUB0
Playback Lower Base (I15)
Default = 00000000
PLB7-PLB0
Alternate Feature Enable I (I16)
Default = 0000eee0
DACZ
40
PUB7
PLB7
D7
D7
D7
rbc
PUB6
PLB6
D6
D6
D6
res
CMCE PMCE
PUB5
PLB5
D5
D5
D5
Playback Upper Base: This register is
the upper byte which represents the
8 most significant bits of the 16-bit
Playback Base register. Reads from
this register return the same value
which was written. The Current
Count registers cannot be read.
When set for MODE 1 or SDC, this
register is used for both the Play-
back and Capture Base registers.
Lower Base Bits: This register is the
lower byte which represents the 8
least significant bits of the 16-bit
Playback Base register. Reads from
this register return the same value
which was written. When set for
MODE 1 or SDC, this register is
used for both the Playback and Cap-
ture Base registers.
DAC Zero: This bit will force the out-
put of the playback channel to AC
zero when an underrun error occurs
1 - Go to center scale
0 - Hold previous valid sample
PUB4
PLB4
D4
D4
D4
PUB3
PLB3
SF1
D3
D3
D3
PUB2
PLB2
SF0
D2
D2
D2
PUB1
PLB1
SPE
D1
D1
D1
DACZ
PUB0
PLB0
D0
D0
D0
SPE
SF1,SF0
PMCE
CMCE
Alternate Feature Enable II (I17)
Default = 0000x000
HPF
TEST
D7
TEST
CrystalClear Portable ISA Audio System
D6
TEST
set, audio data from the ADCs is
sent out SDOUT and audio data
from SDIN is sent to the DACs.
MCE in R0 must be set to change
this bit. This bit is initialized through
the Hardware Configuration data.
1 - Enable serial port
0 - Disable serial port.
format of the serial port when en-
abled by SPE. MCE in R0 must be
set to change these bits. These bits
are initialized through the Hardware
Configuration data.
0 - 64-bit enhanced. Figure 6.
1 - 64-bit. Figure 7.
2 - 32-bit. Figure 8.
3 - ADC/DAC. Figure 9.
When set, it allows modification of
the stereo/mono and audio data for-
mat bits (D7-D4) for the playback
channel, I8. MCE in R0 must be
used to change the sample fre-
quency.
Capture Mode Change Enable.
When set, it allows modification of
the stereo/mono and audio data for-
mat bits (D7-D4) for the capture
channel, I28. MCE in R0 must be
used to change the sample fre-
quency in I8.
High Pass Filter: This bit enables a
DC-blocking high-pass filter in the
digital filter of the ADC. This filter
forces the ADC offset to 0.
0 - disabled
1 - enabled
DSP Serial Port Enable. When
DSP Serial Format. Selects the
Playback Mode Change Enable.
D5
TEST
TM
D4
D3
rbc
D2
res
D1
rbc
CS4239
DS253PP2
HPF
D0