cs4239 Cirrus Logic, Inc., cs4239 Datasheet - Page 58

• Manufacturer Part Number: cs4239
• Description: Crystalclear? Ortable Isa Audio System Logic
• Manufacturer: Cirrus Logic, Inc.

CONTROL INTERFACE
The Control logical device includes registers for
controlling various functions of the part that are
not included in the other logical device blocks.
These functions include game port rate control
and programmable power management, as well
as extra mixing functions.
Control Register Interface
The Control logical device software interface oc-
cupies 8 I/O locations, utilizes 12-bit address
decoding, and is located at PnP address
’CTRLbase’. If the upper address bits, SA12-
SA15 are used, they must be 0 to decode a valid
address. This device can also support an inter-
rupt. Table 16 lists the eight Control registers.
Joystick Control
CTRLbase + 0, Default = xx0x0x01
JR1,0
XTAL
CONSW
58
D7
rbc
D6
rbc
CONSW
D5
Joystick rate control. Selects operating
speed of the joystick (changes the
trigger threshold for the X/Y coordi-
nates).
00 - slowest speed
01 - medium slow speed
10 - medium fast speed
11 - fastest speed
Crystal Oscillator disable. When set, all
functions are disabled except access
to this register. All registers retain
their values in this power-down
mode.
controls host interrupt generation
when a context switch occurs
0 - no interrupt on context switch
1 - Control interrupt generated on
context switch
D4
rbc
XTAL
D3
D2
rbc
JR1
D1 D0
JR0
E
CTRLbase+1, Default = 1xxxx000
CLK
DOUT
DIN/EEN
ICH
2
ICH
D7
PROM Interface
CTRLbase+0
CTRLbase+1
CTRLbase+2
CTRLbase+3
CTRLbase+4
CTRLbase+5
CTRLbase+6
CTRLbase+7
Address
Table 16. Control Logical Device Registers
D6
rbc
CrystalClear Portable ISA Audio System
D5
rbc
for the Plug and Play E
EEN must be set to 1 to make this
bit operational. A 1 sets the SCL pin
high and a 0 sets the SCL pin low.
This bit is used to output serial data
to the Plug and Play E
must be set to 1 to make this bit op-
erational. A 0 causes SDA to go low.
A 1 releases SDA (open-drain).
When read (DIN), this bit reflects
the SDA pin, which should be serial
data output from the Plug and Play
E
1 for this bit to function.
When written (EEN), enables the
E
onto the SCL/SDA pins. Writing:
0 - E
1 - E
Interrupt polarity - CDROM. When set,
the CDINT pin is an active high sig-
nal. When low, CDINT is an active
low signal. This bits can be initial-
ized through the Hardware
Configuration data.
This bit is used to generate the clock
2
2
PROM. EEN and DOUT must be
PROM interface: CLK and DOUT
2
2
D4
Joystick Control
E
Block Power Down
Control Indirect Address Reg.
Control Indirect Data Register
Control/RAM Access
RAM Access End
Global Status
PROM interface disabled
PROM interface enabled
rbc
TM
2
PROM Interface
D3
rbc
Register
DIN/
EEN
D2
2
2
PROM. EEN
PROM.
DOUT
D1
CS4239
DS253PP2
CLK
D0