ltc2208iup-trpbf Linear Technology Corporation, ltc2208iup-trpbf Datasheet
ltc2208iup-trpbf
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ltc2208iup-trpbf Summary of contents
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... Receivers ■ Cellular Base Stations ■ Spectrum Analysis ■ Imaging Systems ■ ATE , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO 3.3V SENSE 1.25V INTERNAL ADC V CM COMMON MODE ...
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... D5 /DB10 EXPOSED PAD IS GND (PIN 65) MUST BE SOLDERED TO PCB BOARD = 125°C, θ 20°C/W** JMAX JA UP PART NUMBER MARKING* LTC2208CUP LTC2208UP LTC2208IUP http://www.linear.com/leadfree/ MIN TYP ±1.2 ● ±1.5 ● ±0.3 ● ±2 ±10 ● ±0.2 ±30 ±15 2 ...
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ALOG I PUT ● The denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are 25°C. (Note 4) A SYMBOL PARAMETER V Analog Input Range ( ...
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LTC2208 ACCURACY otherwise specifi cations are 25° SYMBOL PARAMETER SFDR Spurious Free Dynamic Range th 4 Harmonic or Higher S/(N+D) Signal-to-Noise Plus Distortion Ratio SFDR Spurious Free Dynamic Range at ...
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ODE BIAS CHARACTERISTICS the full operating temperature range, otherwise specifi cations are at T PARAMETER V Output Voltage CM V Output Tempco CM V Line Regulation CM V Output Resistance DIGITAL ...
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LTC2208 W U POWER REQUIRE E TS range, otherwise specifi cations are SYMBOL PARAMETER V Analog Supply Voltage DD P Shutdown Power SHDN STANDARD LVDS OUTPUT MODE OV Output Supply Voltage DD I Analog Supply Current VDD ...
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ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values ...
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LTC2208 DIAGRA S ANALOG INPUT – ENC + ENC DA0-DA15, OFA CLKOUTA CLKOUTB DB0-DB15, OFB ANALOG INPUT N – ENC + ENC DA0-DA15, OFA DB0-DB15, OFB CLKOUTA CLKOUTB 8 Full-Rate CMOS Output Mode Timing ...
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W U TYPICAL PERFOR A Integral Nonlinearity (INL) vs Output Code 2 1.5 1 0.5 0 –0.5 –1 –1.5 –2 32768 0 16384 49152 65536 OUTPUT CODE & / 128K Point FFT 4.93MHz, IN –1dBFS, PGA = 0 ...
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LTC2208 W U TYPICAL PERFOR A CE CHARACTERISTICS SFDR vs Input Level 15MHz, IN PGA = 0, Dither “Off” 140 130 120 110 100 –80 –70 –60 –50 ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS SFDR vs Input Level 70.2MHz, IN PGA = 0, Dither “Off” 130 120 110 100 –20 –10 –80 –70 –60 –50 –40 –30 INPUT ...
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LTC2208 W U TYPICAL PERFOR A CE CHARACTERISTICS 64K Point FFT 250.1MHz, IN –1dBFS, PGA = 1 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS SNR and SFDR vs Duty Cycle 110 100 90 80 SNR DCS OFF 70 SNR DCS ON SFDR DCS OFF SFDR DCS DUTY CYCLE (%) Input Offset Voltage ...
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LTC2208 CTIO S For CMOS Mode. Full Rate or Demultiplexed SENSE (Pin 1): Reference Mode Select and External Reference Input. Tie SENSE 2.5V bandgap reference. An external reference of 2.5V or 1.25V ...
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CTIO S For LVDS Mode. STANDARD or LOW POWER SENSE (Pin 1): Reference Mode Select and External Reference Input. Tie SENSE 2.5V bandgap reference. An external reference of 2.5V or 1.25V may ...
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LTC2208 W BLOCK DIAGRA + A IN INPUT FIRST PIPELINED S/H ADC STAGE – DITHER SIGNAL GENERATOR RANGE SELECT SENSE PGA V CM BUFFER VOLTAGE REFERENCE 16 SECOND PIPELINED THIRD PIPELINED FOURTH PIPELINED ADC STAGE ADC STAGE ADC ...
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U OPERATIO DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N+D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the ADC output. The ...
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LTC2208 U U APPLICATIO S I FOR ATIO CONVERTER OPERATION The LTC2208 is a CMOS pipelined multistep converter with a front-end PGA. As shown in Figure 1, the converter has fi ve pipelined ADC stages; a sampled analog input will ...
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U U APPLICATIO S I FOR ATIO input change is large, such as the change seen with input frequencies near Nyquist, then a larger charging glitch will be seen. Common Mode Bias The ADC sample-and-hold circuit requires differential drive to ...
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LTC2208 U U APPLICATIO S I FOR ATIO Figure 4a shows transformer coupling using a transmis- sion line balun transformer. This type of transformer has much better high frequency response and balance than fl ux coupled center tap transformers. Coupling ...
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U U APPLICATIO S I FOR ATIO The internal programmable gain amplifi er provides the internal reference voltage for the ADC. This amplifi er has very stringent settling requirements and is not accessible for external use. The SENSE pin can ...
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LTC2208 U U APPLICATIO S I FOR ATIO ENC V = 1.6V THRESHOLD 1.6V ENC 0.1µF Figure 9. Single-Ended ENC Drive, Not Recommended for Low Jitter 3.3V 3.3V MC100LVELT22 Figure 10. ENC Drive Using a CMOS to ...
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U U APPLICATIO S I FOR ATIO output may be used but is not required since the ADC has a series resistor of 43Ω on chip. Lower OV voltages will also help reduce interference DD from the digital outputs. V ...
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LTC2208 U U APPLICATIO S I FOR ATIO Overfl ow Bit An overfl ow output bit (OF) indicates when the converter is over-ranged or under-ranged. In CMOS mode, a logic high on the OFA pin indicates an overfl ...
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U U APPLICATIO S I FOR ATIO PC BOARD FPGA CLKOUT OF D15/D0 LTC2208 D14/D0 D2/D0 D1/D0 D0 Figure 14. Descrambling a Scrambled Digital Output LTC2208 + AIN ANALOG S/H INPUT AMP – AIN CLOCK/DUTY CYCLE CONTROL + ENC Figure ...
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LTC2208 U U APPLICATIO S I FOR ATIO Grounding and Bypassing The LTC2208 requires a printed circuit board with a clean unbroken ground plane; a multilayer board with an internal ground plane is recommended. The pinout of the LTC2208 has ...
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U U APPLICATIO S I FOR ATIO Layer 1 Component Side W U LTC2208 Layer 2 GND Plane 2208fb 27 ...
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LTC2208 U U APPLICATIO S I FOR ATIO Layer 3 GND Layer 4 GND 2208fb ...
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U U APPLICATIO S I FOR ATIO Layer 5 GND W U LTC2208 Layer 6 Bottom Side 2208fb 29 ...
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LTC2208 U U APPLICATIO S I FOR ATIO VC5 48 VC4 47 VC3 26 VC2 25 VC1 • • VE5 ...
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... SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 6. DRAWING NOT TO SCALE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights Package 64-Lead Plastic QFN (9mm × ...
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... SNR, 9mm x 9mm QFN Package DC to 3GHz, 21dBm IIP3, Integrated LO Buffer 450MHz 1dB BW, 47dB OIP3, Digital Gain Control 10.5dB to 33dB in 1.5dB/Step 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz 12.5dB, 50Ω Single-Ended RF and LO Ports ● www.linear.com 2208fb LT 0107 REV B • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2005 ...