st62t62b STMicroelectronics, st62t62b Datasheet - Page 15

• Manufacturer Part Number: st62t62b
• Description: 8-bit Otp/eprom Mcus With A/d Converter, Auto-reload Timer And Eeprom
• Manufacturer: STMicroelectronics

CPU REGISTERS (Cont’d)
However, if the program space contains more
than 4096 bytes, the additional memory in pro-
gram space can be addressed by using the Pro-
gram Bank Switch register.
The PC value is incremented after reading the ad-
dress of the current instruction. To execute rela-
tive jumps, the PC and the offset are shifted
through the ALU, where they are added; the result
is then shifted back into the PC. The program
counter can be changed in the following ways:
- JP (Jump) instructionPC=Jump address
- CALL instructionPC= Call address
- Relative Branch Instruction.PC= PC +/- offset
- Interrupt PC=Interrupt vector
- ResetPC= Reset vector
- RET & RETI instructionsPC= Pop (stack)
- Normal instructionPC= PC + 1
Flags (C, Z). The ST6 CPU includes three pairs of
flags (Carry and Zero), each pair being associated
with one of the three normal modes of operation:
Normal mode, Interrupt mode and Non Maskable
Interrupt mode. Each pair consists of a CARRY
flag and a ZERO flag. One pair (CN, ZN) is used
during Normal operation, another pair is used dur-
ing Interrupt mode (CI, ZI), and a third pair is used
in the Non Maskable Interrupt mode (CNMI, ZN-
MI).
The ST6 CPU uses the pair of flags associated
with the current mode: as soon as an interrupt (or
a Non Maskable Interrupt) is generated, the ST6
CPU uses the Interrupt flags (resp. the NMI flags)
instead of the Normal flags. When the RETI in-
struction is executed, the previously used set of
flags is restored. It should be noted that each flag
set can only be addressed in its own context (Non
Maskable Interrupt, Normal Interrupt or Main rou-
tine). The flags are not cleared during context
switching and thus retain their status.
The Carry flag is set when a carry or a borrow oc-
curs during arithmetic operations; otherwise it is
cleared. The Carry flag is also set to the value of
the bit tested in a bit test instruction; it also partic-
ipates in the rotate left instruction.
The Zero flag is set if the result of the last arithme-
tic or logical operation was equal to zero; other-
wise it is cleared.
Switching between the three sets of flags is per-
formed automatically when an NMI, an interrupt or
a RETI instructions occurs. As the NMI mode is
automatically selected after the reset of the MCU,
the ST6 core uses at first the NMI flags.
Stack. The ST6 CPU includes a true LIFO hard-
ware stack which eliminates the need for a stack
pointer. The stack consists of six separate 12-bit
RAM locations that do not belong to the data
space RAM area. When a subroutine call (or inter-
rupt request) occurs, the contents of each level
are shifted into the next higher level, while the
content of the PC is shifted into the first level (the
original contents of the sixth stack level are lost).
When a subroutine or interrupt return occurs (RET
or RETI instructions), the first level register is shift-
ed back into the PC and the value of each level is
popped back into the previous level. Since the ac-
cumulator, in common with all other data space
registers, is not stored in this stack, management
of these registers should be performed within the
subroutine. The stack will remain in its “deepest”
position if more than 6 nested calls or interrupts
are executed, and consequently the last return ad-
dress will be lost. It will also remain in its highest
position if the stack is empty and a RET or RETI is
executed. In this case the next instruction will be
executed.
Figure 7ST6 CPU Programming Mode
l
REGISTER
NORMAL FLAGS
INTERRUPT FLAGS
NMI FLAGS
INDEX
b11
STACK REGISTER
PROGRAM COUNTER
b7
b7
b7
b7
b7
SIX LEVELS
ACCUMULATOR
Y REG. POINTER
X REG. POINTER
ST62T52B ST62T62B/E62B
W REGISTER
V REGISTER
C
C
C
b0
b0
b0
b0
b0
b0
Z
Z
Z
ADDRESSING
VA000423
DIRECT
SHORT
MODE
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